Enable vectored interrupt support for the 74Kf CPU, reflecting hardware.
Signed-off-by: Maciej W. Rozycki <ma...@codesourcery.com>
---
qemu-mips-config-74k-vint.diff
Index: qemu-git-trunk/target-mips/translate_init.c
===================================================================
--- qemu-git-trunk.orig/target-mips/translate_init.c 2014-11-04
03:39:48.458972962 +0000
+++ qemu-git-trunk/target-mips/translate_init.c 2014-11-04 03:43:15.479004225
+0000
@@ -331,7 +331,7 @@ static const mips_def_t mips_defs[] =
(1 << CP0C1_CA),
.CP0_Config2 = MIPS_CONFIG2,
.CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_DSP2P) | (1 << CP0C3_DSPP) |
- (0 << CP0C3_VInt),
+ (1 << CP0C3_VInt),
.CP0_LLAddr_rw_bitmask = 0,
.CP0_LLAddr_shift = 4,
.SYNCI_Step = 32,
