From: Gonglei <arei.gong...@huawei.com> Root ports and downstream ports of switches are the hot pluggable ports in a PCI Express hierarchy. PCI Express supports chip-to-chip interconnect, a PCIe link can only connect one pci device/Switch/EndPoint or PCI-bridge.
7.3. Configuration Transaction Rules (PCI Express specification 3.0) 7.3.1. Device Number Downstream Ports that do not have ARI Forwarding enabled must associate only Device 0 with the device attached to the Logical Bus representing the Link from the Port. If ARI Forwarding is disabled, according to PCIe spec section 7.3.1, only slot 0 with the device attached to logic bus representing the link from downstream ports and root ports. So, adding check for PCIe downstream ports and root ports, which avoid useless operation, both hotplug and coldplug. Changes since v1: - using object_dynamic_cast() instead of simple string comparing (Paolo) - add ARI Forwarding enable bit check - using pcie_cap_get_type() instead of simple string comparing (Marcel) - fix some other comments. Gonglei (2): qdev: Introduce a function to get qbus's parent pci: add check for pcie root ports and downstream ports hw/core/qdev.c | 7 +++++++ hw/pci/pci.c | 51 ++++++++++++++++++++++++++++++++++++++++++++++++++ include/hw/qdev-core.h | 1 + 3 files changed, 59 insertions(+) -- 1.7.12.4
