> + case OPC2_16_SR_RSUB: > + /* overflow only if r1 = -0x80000000 */ > + temp = tcg_const_i32(-0x80000000); > + t0 = tcg_const_i32(0); > + t1 = tcg_const_i32(1); > + tcg_gen_movcond_tl(TCG_COND_EQ, cpu_PSW_V, cpu_gpr_d[r1], temp, t1, > t0);
This is setcond. > + tcg_gen_movcond_tl(TCG_COND_EQ, cpu_PSW_SV, cpu_gpr_d[r1], temp, > + t1, cpu_PSW_SV); This is or of the setcond. r~