At the moment sPAPR PHB supports only a single 32bit window which is normally 1..2GB which is not enough for high performance devices.
PAPR spec enables creating an additional window(s) to support 64bit DMA and bigger page sizes. This patchset adds DDW support for pseries. The host kernel changes are required. This was tested on POWER8 system which allows one additional DMA window which is mapped at 0x800.0000.0000.0000 and supports 16MB pages. Existing guests check for DDW capabilities in PHB's device tree and if it is present, they request for an additional window and map entire guest RAM using H_PUT_TCE/... hypercalls once at boot time and switch to direct DMA operations. TCE tables still may be big enough for guests backed with 64K pages but they are reasonably small for guests backed by 16MB pages. Please comment. Thanks! Alexey Kardashevskiy (10): qom: Make object_child_foreach safe for objects removal spapr_iommu: Disable in-kernel IOMMU tables for >4GB windows spapr_pci: Make find_phb()/find_dev() public spapr_iommu: Make spapr_tce_find_by_liobn() public linux headers update for DDW spapr_rtas: Add Dynamic DMA windows (DDW) RTAS calls support spapr: Add "ddw" machine option spapr_pci: Enable DDW spapr_pci_vfio: Enable DDW vfio: Enable DDW ioctls to VFIO IOMMU driver hw/misc/vfio.c | 4 + hw/ppc/Makefile.objs | 3 + hw/ppc/spapr.c | 15 +++ hw/ppc/spapr_iommu.c | 8 +- hw/ppc/spapr_pci.c | 87 +++++++++++-- hw/ppc/spapr_pci_vfio.c | 75 +++++++++++ hw/ppc/spapr_rtas_ddw.c | 296 ++++++++++++++++++++++++++++++++++++++++++++ include/hw/pci-host/spapr.h | 27 ++++ include/hw/ppc/spapr.h | 7 +- linux-headers/linux/vfio.h | 37 +++++- qom/object.c | 4 +- trace-events | 4 + vl.c | 4 + 13 files changed, 552 insertions(+), 19 deletions(-) create mode 100644 hw/ppc/spapr_rtas_ddw.c -- 2.0.0
