[Qemu-devel] [PATCH 10/12] target-mips: update cpu_save/cpu_load to support BadInstr registers

[Leon Alrae]

Signed-off-by: Leon Alrae <leon.al...@imgtec.com>
---
 target-mips/machine.c |    8 ++++++++
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/target-mips/machine.c b/target-mips/machine.c
index 966c5ef..a51b344 100644
--- a/target-mips/machine.c
+++ b/target-mips/machine.c
@@ -26,6 +26,10 @@ static void save_tc(QEMUFile *f, TCState *tc)
     qemu_put_betls(f, &tc->CP0_TCScheFBack);
     qemu_put_sbe32s(f, &tc->CP0_Debug_tcstatus);
     qemu_put_betls(f, &tc->CP0_UserLocal);
+    qemu_put_be32s(f, &tc->last_instr);
+    qemu_put_be32s(f, &tc->CP0_BadInstr);
+    qemu_put_be32s(f, &tc->last_branch);
+    qemu_put_be32s(f, &tc->CP0_BadInstrP);
 }
 
 static void save_fpu(QEMUFile *f, CPUMIPSFPUContext *fpu)
@@ -179,6 +183,10 @@ static void load_tc(QEMUFile *f, TCState *tc, int 
version_id)
     qemu_get_sbe32s(f, &tc->CP0_Debug_tcstatus);
     if (version_id >= 4) {
         qemu_get_betls(f, &tc->CP0_UserLocal);
+        qemu_get_be32s(f, &tc->last_instr);
+        qemu_get_be32s(f, &tc->CP0_BadInstr);
+        qemu_get_be32s(f, &tc->last_branch);
+        qemu_get_be32s(f, &tc->CP0_BadInstrP);
     }
 }
 
-- 
1.7.5.4