* accomodate -> accommodate
* aquiring -> acquiring
* beacuse -> because
* loosing -> losing
* prefering -> preferring
* threshhold -> threshold
Signed-off-by: Stefan Weil <s...@weilnetz.de>
---
block/iscsi.c | 2 +-
hw/input/hid.c | 2 +-
target-arm/helper.c | 2 +-
tcg/mips/tcg-target.c | 4 ++--
tests/qemu-iotests/common.qemu | 2 +-
translate-all.c | 2 +-
6 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/block/iscsi.c b/block/iscsi.c
index 799752b..155756b 100644
--- a/block/iscsi.c
+++ b/block/iscsi.c
@@ -98,7 +98,7 @@ typedef struct IscsiAIOCB {
#define MAX_NOP_FAILURES 3
#define ISCSI_CMD_RETRIES 5
-/* this threshhold is a trade-off knob to choose between
+/* this threshold is a trade-off knob to choose between
* the potential additional overhead of an extra GET_LBA_STATUS request
* vs. unnecessarily reading a lot of zero sectors over the wire.
* If a read request is greater or equal than ISCSI_CHECKALLOC_THRES
diff --git a/hw/input/hid.c b/hw/input/hid.c
index 295bdab..9656e90 100644
--- a/hw/input/hid.c
+++ b/hw/input/hid.c
@@ -164,7 +164,7 @@ static void hid_pointer_sync(DeviceState *dev)
if (hs->n == QUEUE_LENGTH-1) {
/*
- * Queue full. We are loosing information, but we at least
+ * Queue full. We are losing information, but we at least
* keep track of most recent button state.
*/
return;
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 050c409..e7f2a67 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2339,7 +2339,7 @@ void register_cp_regs_for_features(ARMCPU *cpu)
{ .name = "ID_AA64DFR0_EL1", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 0, .crn = 0, .crm = 5, .opc2 = 0,
.access = PL1_R, .type = ARM_CP_CONST,
- /* We mask out the PMUVer field, beacuse we don't currently
+ /* We mask out the PMUVer field, because we don't currently
* implement the PMU. Not advertising it prevents the guest
* from trying to use it and getting UNDEFs on registers we
* don't implement.
diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c
index 8855d50..9cce356 100644
--- a/tcg/mips/tcg-target.c
+++ b/tcg/mips/tcg-target.c
@@ -781,7 +781,7 @@ static void tcg_out_brcond2(TCGContext *s, TCGCond cond,
TCGReg al, TCGReg ah,
break;
default:
- /* Minimize code size by prefering a compare not requiring INV. */
+ /* Minimize code size by preferring a compare not requiring INV. */
if (mips_cmp_map[cond] & MIPS_CMP_INV) {
cond = tcg_invert_cond(cond);
b_cond = TCG_COND_EQ;
@@ -810,7 +810,7 @@ static void tcg_out_movcond(TCGContext *s, TCGCond cond,
TCGReg ret,
break;
default:
- /* Minimize code size by prefering a compare not requiring INV. */
+ /* Minimize code size by preferring a compare not requiring INV. */
if (mips_cmp_map[cond] & MIPS_CMP_INV) {
cond = tcg_invert_cond(cond);
m_opc = OPC_MOVZ;
diff --git a/tests/qemu-iotests/common.qemu b/tests/qemu-iotests/common.qemu
index 918af31..ee7ebb4 100644
--- a/tests/qemu-iotests/common.qemu
+++ b/tests/qemu-iotests/common.qemu
@@ -103,7 +103,7 @@ function _send_qemu_cmd()
count=${qemu_cmd_repeat}
use_error="no"
fi
- # This array element extraction is done to accomodate pathnames with spaces
+ # This array element extraction is done to accommodate pathnames with
spaces
cmd=${@: 1:${#@}-1}
shift $(($# - 1))
diff --git a/translate-all.c b/translate-all.c
index 6b7b46e..8685cca 100644
--- a/translate-all.c
+++ b/translate-all.c
@@ -601,7 +601,7 @@ static inline void *alloc_code_gen_buffer(void)
#ifdef __mips__
if (cross_256mb(buf, tcg_ctx.code_gen_buffer_size)) {
- /* Try again, with the original still mapped, to avoid re-aquiring
+ /* Try again, with the original still mapped, to avoid re-acquiring
that 256mb crossing. This time don't specify an address. */
size_t size2, size1 = tcg_ctx.code_gen_buffer_size;
void *buf2 = mmap(NULL, size1, PROT_WRITE | PROT_READ | PROT_EXEC,
--
1.7.10.4
