From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com> So that it can be shared with the A32 code in the future.
Signed-off-by: Edgar E. Iglesias <edgar.igles...@xilinx.com> --- target-arm/translate-a64.c | 5 ----- target-arm/translate.h | 5 +++++ 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 7fce05f..bfd139a 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -162,11 +162,6 @@ void aarch64_cpu_dump_state(CPUState *cs, FILE *f, } } -static inline int get_mem_index(DisasContext *s) -{ - return arm_el_to_mmu_idx(s->current_pl); -} - void gen_a64_set_pc_im(uint64_t val) { tcg_gen_movi_i64(cpu_pc, val); diff --git a/target-arm/translate.h b/target-arm/translate.h index 34328f4..db6f0af 100644 --- a/target-arm/translate.h +++ b/target-arm/translate.h @@ -52,6 +52,11 @@ static inline int arm_dc_feature(DisasContext *dc, int feature) return (dc->features & (1ULL << feature)) != 0; } +static inline int get_mem_index(DisasContext *s) +{ + return arm_el_to_mmu_idx(s->current_pl); +} + /* target-specific extra values for is_jmp */ /* These instructions trap after executing, so the A32/T32 decoder must * defer them until after the conditional execution state has been updated. -- 1.8.3.2