From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com>
For linked branches, updates to the link register happen
conceptually after the read of the branch target register.
Signed-off-by: Edgar E. Iglesias <edgar.igles...@xilinx.com>
---
target-arm/translate-a64.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c
index d86b8ff..0862e54 100644
--- a/target-arm/translate-a64.c
+++ b/target-arm/translate-a64.c
@@ -1507,8 +1507,10 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t
insn)
switch (opc) {
case 0: /* BR */
case 2: /* RET */
+ tcg_gen_mov_i64(cpu_pc, cpu_reg(s, rn));
break;
case 1: /* BLR */
+ tcg_gen_mov_i64(cpu_pc, cpu_reg(s, rn));
tcg_gen_movi_i64(cpu_reg(s, 30), s->pc);
break;
case 4: /* ERET */
@@ -1527,7 +1529,6 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t
insn)
return;
}
- tcg_gen_mov_i64(cpu_pc, cpu_reg(s, rn));
s->is_jmp = DISAS_JUMP;
}
--
1.8.3.2
