On 04/15/14 13:26, Beniamino Galvani wrote:
On Mon, Apr 14, 2014 at 08:18:56PM -0700, Peter Crosthwaite wrote:
Add support for 16, 32 and 64 bit width FIFOs. The push and pop
functions are replicated to accept all four different integer types.
The element width of the FIFO is set at creation time.
The backing storage for all element types is still uint8_t regardless of
element width so some save-load logic is needed to handle endianness
issue WRT VMSD.
Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com>
---
changed since v3:
Initialised buffer_size properly (Beniamino review)
changed since v2:
replicated (and glueified) the push/pop functions (Don Slutz review).
Fix "each each" typo (Beniamino review).
Done use "Case(n):" (Beniamino review).
hw/char/serial.c | 4 +-
hw/net/allwinner_emac.c | 6 +--
hw/ssi/xilinx_spi.c | 4 +-
hw/ssi/xilinx_spips.c | 4 +-
include/qemu/fifo.h | 33 ++++++++++---
util/fifo.c | 121 +++++++++++++++++++++++++++++++++++++-----------
6 files changed, 128 insertions(+), 44 deletions(-)
Looks good to me,
Reviewed-by: Beniamino Galvani <b.galv...@gmail.com>
Also:
Reviewed-by: Don Slutz <dsl...@verizon.com>
