Signed-off-by: Chen Fan <chen.fan.f...@cn.fujitsu.com>
---
hw/i386/pc.c | 25 ++++++++++++++-----------
target-i386/cpu.c | 28 +++++++++++++++++++++++-----
target-i386/cpu.h | 5 +++++
target-i386/topology.h | 18 ++++++++++++++++++
4 files changed, 60 insertions(+), 16 deletions(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index e715a33..765b634 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -927,11 +927,18 @@ void pc_acpi_smi_interrupt(void *opaque, int irq, int
level)
}
}
-static X86CPU *pc_new_cpu(const char *cpu_model, int64_t apic_id,
+static X86CPU *pc_new_cpu(const char *cpu_model, X86CPUTopoInfo *topo,
DeviceState *icc_bridge, Error **errp)
{
X86CPU *cpu;
Error *local_err = NULL;
+ int64_t apic_id = apicid_from_topo_ids(smp_cores, smp_threads, topo);
+
+ if (cpu_exists(apic_id)) {
+ error_setg(errp, "Unable to add CPU with APIC ID: %" PRIi64
+ ", it already exists", apic_id);
+ return NULL;
+ }
cpu = cpu_x86_create(cpu_model, icc_bridge, &local_err);
if (local_err != NULL) {
@@ -955,19 +962,13 @@ static const char *current_cpu_model;
void pc_hot_add_cpu(const int64_t id, Error **errp)
{
DeviceState *icc_bridge;
- int64_t apic_id = x86_cpu_apic_id_from_index(id);
+ X86CPUTopoInfo topo;
if (id < 0) {
error_setg(errp, "Invalid CPU id: %" PRIi64, id);
return;
}
- if (cpu_exists(apic_id)) {
- error_setg(errp, "Unable to add CPU: %" PRIi64
- ", it already exists", id);
- return;
- }
-
if (id >= max_cpus) {
error_setg(errp, "Unable to add CPU: %" PRIi64
", max allowed: %d", id, max_cpus - 1);
@@ -976,7 +977,8 @@ void pc_hot_add_cpu(const int64_t id, Error **errp)
icc_bridge = DEVICE(object_resolve_path_type("icc-bridge",
TYPE_ICC_BRIDGE, NULL));
- pc_new_cpu(current_cpu_model, apic_id, icc_bridge, errp);
+ x86_cpu_topo_ids_from_index(id, &topo);
+ pc_new_cpu(current_cpu_model, &topo, icc_bridge, errp);
}
void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
@@ -996,8 +998,9 @@ void pc_cpus_init(const char *cpu_model, DeviceState
*icc_bridge)
current_cpu_model = cpu_model;
for (i = 0; i < smp_cpus; i++) {
- cpu = pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i),
- icc_bridge, &error);
+ X86CPUTopoInfo topo;
+ x86_cpu_topo_ids_from_index(i, &topo);
+ cpu = pc_new_cpu(cpu_model, &topo, icc_bridge, &error);
if (error) {
error_report("%s", error_get_pretty(error));
error_free(error);
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 0e8812a..d8ad484 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -23,8 +23,6 @@
#include "cpu.h"
#include "sysemu/kvm.h"
-#include "sysemu/cpus.h"
-#include "topology.h"
#include "qemu/option.h"
#include "qemu/config-file.h"
@@ -2584,6 +2582,8 @@ void enable_compat_apic_id_mode(void)
compat_apic_id_mode = true;
}
+static bool compat_apic_id_warned;
+
/* Calculates initial APIC ID for a specific CPU index
*
* Currently we need to be able to calculate the APIC ID from the CPU index
@@ -2594,14 +2594,13 @@ void enable_compat_apic_id_mode(void)
uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index)
{
uint32_t correct_id;
- static bool warned;
correct_id = x86_apicid_from_cpu_idx(smp_cores, smp_threads, cpu_index);
if (compat_apic_id_mode) {
- if (cpu_index != correct_id && !warned) {
+ if (cpu_index != correct_id && !compat_apic_id_warned) {
error_report("APIC IDs set in compatibility mode, "
"CPU topology won't match the configuration");
- warned = true;
+ compat_apic_id_warned = true;
}
return cpu_index;
} else {
@@ -2609,6 +2608,25 @@ uint32_t x86_cpu_apic_id_from_index(unsigned int
cpu_index)
}
}
+void x86_cpu_topo_ids_from_index(unsigned int cpu_index, X86CPUTopoInfo *topo)
+{
+ int64_t correct_apic_id;
+
+ x86_topo_ids_from_idx(smp_cores, smp_threads, cpu_index, topo);
+ if (compat_apic_id_mode) {
+ correct_apic_id = apicid_from_topo_ids(smp_cores,
+ smp_threads,
+ topo);
+ if (cpu_index != correct_apic_id && !compat_apic_id_warned) {
+ error_report("APIC IDs set in compatibility mode, "
+ "CPU topology won't match the configuration");
+ compat_apic_id_warned = true;
+ }
+ x86_topo_ids_from_apic_id(smp_cores, smp_threads, cpu_index, topo);
+ assert(apicid_from_topo_ids(smp_cores, smp_threads, topo) ==
cpu_index);
+ }
+}
+
static void x86_cpu_initfn(Object *obj)
{
CPUState *cs = CPU(obj);
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 0014acc..a410b16 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -22,6 +22,9 @@
#include "config.h"
#include "qemu-common.h"
+#include "sysemu/cpus.h"
+#include "topology.h"
+
#ifdef TARGET_X86_64
#define TARGET_LONG_BITS 64
#else
@@ -1286,6 +1289,8 @@ void x86_cpu_compat_set_features(const char *cpu_model,
FeatureWord w,
const char *get_register_name_32(unsigned int reg);
uint32_t x86_cpu_apic_id_from_index(unsigned int cpu_index);
+void x86_cpu_topo_ids_from_index(unsigned int cpu_index,
+ X86CPUTopoInfo *topo);
void enable_compat_apic_id_mode(void);
#define APIC_DEFAULT_ADDRESS 0xfee00000
diff --git a/target-i386/topology.h b/target-i386/topology.h
index 9b811c1..6f7eebb 100644
--- a/target-i386/topology.h
+++ b/target-i386/topology.h
@@ -132,4 +132,22 @@ static inline apic_id_t x86_apicid_from_cpu_idx(unsigned
nr_cores,
return apicid_from_topo_ids(nr_cores, nr_threads, &topo);
}
+/* Calculate CPU topology based on CPU APIC ID.
+ */
+static inline void x86_topo_ids_from_apic_id(unsigned nr_cores,
+ unsigned nr_threads,
+ apic_id_t apic_id,
+ X86CPUTopoInfo *topo)
+{
+ unsigned offset_mask;
+ topo->pkg_id = apic_id >> apicid_pkg_offset(nr_cores, nr_threads);
+
+ offset_mask = (1L << apicid_pkg_offset(nr_cores, nr_threads)) - 1;
+ topo->core_id = (apic_id & offset_mask)
+ >> apicid_core_offset(nr_cores, nr_threads);
+
+ offset_mask = (1L << apicid_core_offset(nr_cores, nr_threads)) - 1;
+ topo->smt_id = apic_id & offset_mask;
+}
+
#endif /* TARGET_I386_TOPOLOGY_H */
--
1.8.1.4
