Signed-off-by: Romain Dolbeau <rom...@dolbeau.org> --- hw/net/e1000.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/hw/net/e1000.c b/hw/net/e1000.c index 4d7204c..8987edd 100644 --- a/hw/net/e1000.c +++ b/hw/net/e1000.c @@ -49,7 +49,7 @@ enum { DEBUG_UNKNOWN, DEBUG_TXSUM, DEBUG_TXERR, DEBUG_RXERR, DEBUG_RXFILTER, DEBUG_PHY, DEBUG_NOTYET, }; -#define DBGBIT(x) (1<<DEBUG_##x) +#define DBGBIT(x) (1 << DEBUG_##x) static int debugflags = DBGBIT(TXERR) | DBGBIT(GENERAL); #define DBGOUT(what, fmt, ...) do { \ @@ -557,7 +557,7 @@ set_eecd(E1000State *s, int index, uint32_t val) if (val & E1000_EECD_DI) s->eecd_state.val_in |= 1; if (++s->eecd_state.bitnum_in == 9 && !s->eecd_state.reading) { - s->eecd_state.bitnum_out = ((s->eecd_state.val_in & 0x3f)<<4)-1; + s->eecd_state.bitnum_out = ((s->eecd_state.val_in & 0x3f) << 4)-1; s->eecd_state.reading = (((s->eecd_state.val_in >> 6) & 7) == EEPROM_READ_OPCODE_MICROWIRE); } @@ -1291,10 +1291,10 @@ e1000_mmio_write(void *opaque, hwaddr addr, uint64_t val, if (index < NWRITEOPS && macreg_writeops[index]) { macreg_writeops[index](s, index, val); } else if (index < NREADOPS && macreg_readops[index]) { - DBGOUT(MMIO, "e1000_mmio_writel RO %x: 0x%04"PRIx64"\n", index<<2, val); + DBGOUT(MMIO, "e1000_mmio_writel RO %x: 0x%04"PRIx64"\n", index << 2, val); } else { DBGOUT(UNKNOWN, "MMIO unknown write addr=0x%08x,val=0x%08"PRIx64"\n", - index<<2, val); + index << 2, val); } } @@ -1308,7 +1308,7 @@ e1000_mmio_read(void *opaque, hwaddr addr, unsigned size) { return macreg_readops[index](s, index); } - DBGOUT(UNKNOWN, "MMIO unknown read addr=0x%08x\n", index<<2); + DBGOUT(UNKNOWN, "MMIO unknown read addr=0x%08x\n", index << 2); return 0; } @@ -1358,7 +1358,7 @@ e1000_flash_write(void *opaque, hwaddr addr, uint64_t val, } } else { DBGOUT(UNKNOWN, "Flash unknown write addr=0x%08x,val=0x%08"PRIx64"\n", - index<<2, val); + index << 2, val); } } @@ -1371,7 +1371,7 @@ e1000_flash_read(void *opaque, hwaddr addr, unsigned size) if (index < FLASH_RSIZE) { return s->flash_reg[index]; } - DBGOUT(UNKNOWN, "Flash unknown read addr=0x%08x\n", index<<2); + DBGOUT(UNKNOWN, "Flash unknown read addr=0x%08x\n", index << 2); return 0; } @@ -1783,7 +1783,7 @@ static int pci_e1000_init(PCIDevice *pci_dev) qemu_macaddr_default_if_unset(&d->conf.macaddr); macaddr = d->conf.macaddr.a; for (i = 0; i < 3; i++) - d->eeprom_data[i] = (macaddr[2*i+1]<<8) | macaddr[2*i]; + d->eeprom_data[i] = (macaddr[2*i+1] << 8) | macaddr[2*i]; /* update eeprom with the proper device_id */ d->eeprom_data[11] = pdc->device_id; d->eeprom_data[13] = pdc->device_id; @@ -1803,7 +1803,7 @@ static int pci_e1000_init(PCIDevice *pci_dev) d->eeprom_data[i] = e1000_ich8_flash_template[i]; } for (i = 0; i < 3; i++) { - d->eeprom_data[i] = (macaddr[2*i+1]<<8) | macaddr[2*i]; + d->eeprom_data[i] = (macaddr[2*i+1] << 8) | macaddr[2*i]; } d->eeprom_data[11] = pdc->device_id; d->eeprom_data[13] = pdc->device_id; -- 1.7.10.4