From: Rob Herring <rob.herr...@linaro.org>
Offset 4 is UARTRSR/UARTECR, not the UARTCR. As framing and parity errors
will never occur, we can ignore writes to this register.
Signed-off-by: Rob Herring <rob.herr...@linaro.org>
---
hw/char/pl011.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index a8ae6f4..8ced7cd 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -146,8 +146,8 @@ static void pl011_write(void *opaque, hwaddr offset,
s->int_level |= PL011_INT_TX;
pl011_update(s);
break;
- case 1: /* UARTCR */
- s->cr = value;
+ case 1: /* UARTRSR/UARTECR */
+ /* Writes to Rx Status / Error Clear register are ignored. */
break;
case 6: /* UARTFR */
/* Writes to Flag register are ignored. */
--
1.8.3.2
