Wire up the reset line from the SLCR to the CPUs.
Signed-off-by: Peter Crosthwaite <peter.crosthwa...@xilinx.com>
---
hw/arm/xilinx_zynq.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 63390f7..1898d5a 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -203,6 +203,10 @@ static void zynq_init(QEMUMachineInitArgs *args)
dev = qdev_create(NULL, "xilinx,zynq_slcr");
qdev_init_nofail(dev);
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xF8000000);
+ for (n = 0; n < smp_cpus; n++) {
+ qdev_connect_gpio_out(dev, n,
+ qdev_get_gpio_in(DEVICE(cpu[n]), ARM_CPU_RESET));
+ }
dev = qdev_create(NULL, "a9mpcore_priv");
qdev_prop_set_uint32(dev, "num-cpu", smp_cpus);
--
1.8.5.3
