This patch adds the fcfids, fcfidu and fcfidus instructions which
were introduced in Power ISA 2.06. A common macro is provided to
eliminated redudant code, and the existing fcfid instruction is
re-implemented to use this macro.
Signed-off-by: Tom Musta <tommu...@gmail.com>
---
target-ppc/fpu_helper.c | 23 ++++++++++++++++-------
target-ppc/helper.h | 3 +++
target-ppc/translate.c | 9 +++++++++
3 files changed, 28 insertions(+), 7 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_helper.c
index 17e99c3..18b9bcd 100644
--- a/target-ppc/fpu_helper.c
+++ b/target-ppc/fpu_helper.c
@@ -637,16 +637,25 @@ FPU_FCTI(fctiduz, uint64_round_to_zero,
0x0000000000000000)
#endif
#if defined(TARGET_PPC64)
-/* fcfid - fcfid. */
-uint64_t helper_fcfid(CPUPPCState *env, uint64_t arg)
-{
- CPU_DoubleU farg;
-
- farg.d = int64_to_float64(arg, &env->fp_status);
- return farg.ll;
-}
-
+#define FPU_FCFI(op, cvtr, is_single) \
+uint64_t helper_##op(CPUPPCState *env, uint64_t arg) \
+{ \
+ CPU_DoubleU farg; \
+ \
+ farg.d = cvtr(arg, &env->fp_status); \
+ \
+ if (is_single) { \
+ farg.d = helper_frsp(env, farg.d); \
+ } \
+ helper_float_check_status(env); \
+ return farg.ll; \
+}
+
+FPU_FCFI(fcfid, int64_to_float64, 0)
+FPU_FCFI(fcfids, int64_to_float64, 1)
+FPU_FCFI(fcfidu, uint64_to_float64, 0)
+FPU_FCFI(fcfidus, uint64_to_float64, 1)
#endif
diff --git a/target-ppc/helper.h b/target-ppc/helper.h
index 4518da0..19b2f6b 100644
--- a/target-ppc/helper.h
+++ b/target-ppc/helper.h
@@ -69,6 +69,9 @@ DEF_HELPER_2(fctiwz, i64, env, i64)
DEF_HELPER_2(fctiwuz, i64, env, i64)
#if defined(TARGET_PPC64)
DEF_HELPER_2(fcfid, i64, env, i64)
+DEF_HELPER_2(fcfidu, i64, env, i64)
+DEF_HELPER_2(fcfids, i64, env, i64)
+DEF_HELPER_2(fcfidus, i64, env, i64)
DEF_HELPER_2(fctid, i64, env, i64)
DEF_HELPER_2(fctidu, i64, env, i64)
DEF_HELPER_2(fctidz, i64, env, i64)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index 5ac00c6..9f0c682 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -2274,6 +2274,12 @@ GEN_FLOAT_B(rsp, 0x0C, 0x00, 1, PPC_FLOAT);
#if defined(TARGET_PPC64)
/* fcfid */
GEN_FLOAT_B(cfid, 0x0E, 0x1A, 1, PPC_64B);
+/* fcfids */
+GEN_FLOAT_B(cfids, 0x0E, 0x1A, 0, PPC2_ISA206);
+/* fcfidu */
+GEN_FLOAT_B(cfidu, 0x0E, 0x1E, 0, PPC2_ISA206);
+/* fcfidus */
+GEN_FLOAT_B(cfidus, 0x0E, 0x1E, 0, PPC2_ISA206);
/* fctid */
GEN_FLOAT_B(ctid, 0x0E, 0x19, 0, PPC_64B);
/* fctidu */
@@ -9802,6 +9808,9 @@ GEN_HANDLER_E(fctiwuz, 0x3F, 0x0F, 0x04, 0x00000000,
PPC_NONE, PPC2_ISA206),
GEN_FLOAT_B(rsp, 0x0C, 0x00, 1, PPC_FLOAT),
#if defined(TARGET_PPC64)
GEN_FLOAT_B(cfid, 0x0E, 0x1A, 1, PPC_64B),
+GEN_HANDLER_E(fcfids, 0x3B, 0x0E, 0x1A, 0x00000000, PPC_NONE, PPC2_ISA206),
+GEN_HANDLER_E(fcfidu, 0x3F, 0x0E, 0x1E, 0x00000000, PPC_NONE, PPC2_ISA206),
+GEN_HANDLER_E(fcfidus, 0x3B, 0x0E, 0x1E, 0x00000000, PPC_NONE, PPC2_ISA206),
GEN_FLOAT_B(ctid, 0x0E, 0x19, 0, PPC_64B),
GEN_HANDLER_E(fctidu, 0x3F, 0x0E, 0x1D, 0x00000000, PPC_NONE, PPC2_ISA206),
GEN_FLOAT_B(ctidz, 0x0F, 0x19, 0, PPC_64B),
--
1.7.1
