On Thu, Dec 5, 2013 at 7:34 AM, Peter Maydell <peter.mayd...@linaro.org> wrote: > On 4 December 2013 21:20, Antony Pavlov <antonynpav...@gmail.com> wrote: >> On Wed, 4 Dec 2013 20:29:05 +0000 >> Peter Maydell <peter.mayd...@linaro.org> wrote: >> >>> On 4 December 2013 20:22, Antony Pavlov <antonynpav...@gmail.com> wrote: >>> > Here is my proposition: >>> > >>> > 1. qemu board code setup CPU to start from 0xFFFF0000. (0xffff0000 is a >>> > ROM address >>> > on DIGIC chips) >>> >>> Sort of. What we need is: >>> 1a. Add a "hivecs" property to the ARM CPU object (which >>> just sets env->cp15.c1_sys bit 13) >>> >>> (this is about half a dozen lines of code max) >>> >>> 1b DIGIC board init code creates the CPU and sets the hivecs property on it >>> >>> (another handful of lines of code) >> >> Ok, I'll try to make the work at the weekend. > > The recent (not yet applied) patchset adding a property for the CBAR > register value is probably a good model to look at. >
Is hivecs-on-reset ideally a new ARM_FEATURE or is there a simpler conditional we can use as post_init time? Regards, Peter > -- PMM >
