This started out merely to update the i386 target to use the new tcg_gen_qemu_{ld,st}_{i32,i64,tl} entry points. This goal is complete around patch 18.
But in the process of doing that, I noticed a lot of room for cleanup wrt "helper" functions that only obfuscate the goal. That's primarily what all of the "Remove" patches are about. We also had "size-like" variables in two different domains: (1) the operand-type ("ot") domain using OT_{BYTE,WORD,LONG,QUAD}, which was log2(byte_size); and (2) the dflag/aflag domain using bare integer constants which was log2(byte_size)-1. Moving to the log2(byte_size) domain using MO_SIZE constants cleans up everything nicely, reducing confusion. Finally, there are a set of bugs fixed with regard to failing to zero-extend 32-bit addresses in the x86-64 translator. This is easiest to see in patch 38 (Fix addr32 prefix in gen_lea_modrm) which fixes an existing test case. But I believe that introducing gen_lea_v_seg and using it everywhere fixes quite a few similar bugs that would be more difficult to notice. This does wind up adding some zero-extensions that by inspection can be seen to be redundant (each generated by different subroutines), but I believe the tcg optimizer improvements that Aurelien has posted (but not committed) would clean those up. r~ Richard Henderson (61): exec: Delay CPU_LOG_TB_CPU until we actually execute a TB target-i386: Push DisasContext into load/store helpers target-i386: Stop encoding DisasContext.mem_index target-i386: Use new tcg_gen_qemu_ld_* helpers target-i386: Use new tcg_gen_qemu_st_* helpers target-i386: Replace OT_* constants with MO_* constants target-i386: Remove gen_op_ld_T0_A0 target-i386: Remove gen_op_ldu_T0_A0 target-i386: Remove gen_op_ld_T1_A0 target-i386: Remove gen_op_lds_T0_A0 target-i386: Introduce gen_op_st_rm_T0_A0 target-i386: Remove gen_op_st_T0_A0 target-i386: Remove gen_op_st_T1_A0 target-i386: Fix typo in gen_push_T1 target-i386: Tidy mov[sz][bw] target-i386: Tidy movsl target-i386: Remove unused arguments to gen_lea_modrm target-i386: Use MO_BE for movbe target-i386: Tidy gen_op_mov_TN_reg+tcg_gen_trunc_tl_i32 target-i386: Tidy load + truncate target-i386: Tidy extend + store target-i386: Tidy extend + move target-i386: Remove gen_op_movl_T0_0 target-i386: Remove gen_op_movl_T0_im* target-i386: Remove gen_op_movl_T0_im* target-i386: Remove gen_op_mov*_A0_im target-i386: Remove gen_movtl_T*_im target-i386: Remove gen_op_andl_T0_ffff target-i386: Remove gen_op_andl_T0_im target-i386: Remove gen_op_movl_T0_T1 target-i386: Remove gen_op_andl_A0_ffff target-i386: Use TCGMemOp for 'ot' variables target-i386: Change gen_op_add_reg_* size parameter to TCGMemOp target-i386: Change gen_op_j*z_ecx size parameter to TCGMemOp target-i386: Change aflag to TCGMemOp target-i386: Change gen_op_mov_reg_A0 size parameter to TCGMemOp target-i386: Change dflag to TCGMemOp target-i386: Fix addr32 prefix in gen_lea_modrm target-i386: Tidy addr16 code in gen_lea_modrm target-i386: Combine gen_push_T* into gen_push_v target_i386: Clean up gen_pop_T0 target-i386: Create gen_lea_v_seg target-i386: Use gen_lea_v_seg in gen_lea_modrm target-i386: Use gen_lea_v_seg in stack subroutines target-i386: Tidy cpu_regs initialization target-i386: Access segs via TCG registers target-i386: Use gen_lea_v_seg in pusha/popa target-i386: Rewrite gen_enter inline target-i386: Introduce mo_stacksize target-i386: Rewrite leave target-i386: Remove gen_op_mov_reg_T0 target-i386: Remove gen_op_mov_reg_T1 target-i386: Remove gen_op_addl_T0_T1 target-i386: Remove gen_op_mov_TN_reg target-i386: Remove gen_op_mov_reg_A0 target-i386: Remove gen_op_movl_A0_reg target-i386: Tidy gen_add_A0_im target-i386: Tidy some size computation target-i386: Rename gen_op_jmp_T0 to gen_op_jmp_v target-i386: Tidy ljmp target-i386: Deconstruct the cpu_T array cpu-exec.c | 36 +- target-i386/helper.h | 4 - target-i386/seg_helper.c | 68 - target-i386/translate.c | 3806 ++++++++++++++++++++-------------------------- 4 files changed, 1654 insertions(+), 2260 deletions(-) -- 1.8.3.1