On Thu, Oct 17, 2013 at 07:30:02PM -0700, Roy Franz wrote: > For buffered writes, mask the length with the maximum supported > length. This is required for block writes to work on the ARM vexpress > platform, where the flash interface is 32 bits wide. For buffered writes > to the 2 16 bit flashes on the interface, the length is repeated in each > 16 bit word, and without this mask the two lengths are interpreted > as a single 32 bit value that is very large. > > Signed-off-by: Roy Franz <roy.fr...@linaro.org> > --- > hw/block/pflash_cfi01.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c > index 018a967..a364cca 100644 > --- a/hw/block/pflash_cfi01.c > +++ b/hw/block/pflash_cfi01.c > @@ -378,6 +378,7 @@ static void pflash_write(pflash_t *pfl, hwaddr offset, > > break; > case 0xe8: > + value &= pfl->writeblock_size - 1;
This patch feels weird. Should the 32-bit interface width be truncated down to 16 bits before dispatching pflash_write()? It's not clear to me that truncating just in this specific case is correct. But then I don't know the hardware :). Stefan
