On 01/12/2013 03:40 AM, Blue Swirl wrote:
MULX implies a bunch of other instructions due to CPUID flag grouping. ADCX and ADOX can be implemented separately. None of these and the other instructions in the MULX group look very complex.
I've got a patch for (most of?) the bmi[12] insns: git://repo.or.cz/qemu/rth.git x86-next This includes general support for the VEX prefixes. But before I did anything else for the adx extension, I thought I'd have a look back at Paolo's eflags optimization patch series that he posted in October. Otherwise we'll not be able to get really good emulation of these insns. r~
