On 14.12.2012, at 03:12, Scott Wood wrote:
> If we access a register via the QEMU memory inspection commands (e.g.
> "xp") rather than from guest code, we won't have a CPU context.
> Gracefully fail to access the register in that case, rather than
> crashing.
Can't we set cpu_single_env in the debug memory access case? I'm not sure this
is the only device with that problem, and by always having cpu_single_env
available we would completely get rid of the whole bug category.
Alex
>
> Signed-off-by: Scott Wood <scottw...@freescale.com>
> ---
> hw/openpic.c | 16 +++++++++++++++-
> 1 file changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/hw/openpic.c b/hw/openpic.c
> index 8c3f04d..c57a168 100644
> --- a/hw/openpic.c
> +++ b/hw/openpic.c
> @@ -161,7 +161,11 @@ static inline int test_bit(uint32_t *field, int bit)
>
> static int get_current_cpu(void)
> {
> - return cpu_single_env->cpu_index;
> + if (!cpu_single_env) {
> + return -1;
> + }
> +
> + return cpu_single_env->cpu_index;
> }
>
> static uint32_t openpic_cpu_read_internal(void *opaque, hwaddr addr,
> @@ -797,6 +801,11 @@ static void openpic_cpu_write_internal(void *opaque,
> hwaddr addr,
>
> DPRINTF("%s: cpu %d addr " TARGET_FMT_plx " <= %08x\n", __func__, idx,
> addr, val);
> +
> + if (idx < 0) {
> + return;
> + }
> +
> if (addr & 0xF)
> return;
> dst = &opp->dst[idx];
> @@ -862,6 +871,11 @@ static uint32_t openpic_cpu_read_internal(void *opaque,
> hwaddr addr,
>
> DPRINTF("%s: cpu %d addr " TARGET_FMT_plx "\n", __func__, idx, addr);
> retval = 0xFFFFFFFF;
> +
> + if (idx < 0) {
> + return retval;
> + }
> +
> if (addr & 0xF)
> return retval;
> dst = &opp->dst[idx];
> --
> 1.7.9.5
>
>
