This patchset adds support for booting with >4GB of RAM on the Versatile Express Cortex-A15 model. There are some caveats: * you need an LPAE A15 kernel * you need to be booting with device tree * your device tree blob needs to specify #address-cells and #size-cells as 2 (so addresses and sizes are 64 bit), which means you'll need to tweak the stock kernel dtb * you need a minor kernel patch which stops the kernel throwing away the high 32 bits of the RAM size: http://patches.linaro.org/9856/ * you need a 64 bit host, obviously
This patchset sits on top of the LPAE patches and that bugfix patch for 64 bit cp register writes. Peter: I've cc'd you as device-tree.[ch] maintainer since I've added some new helper functions there. Peter Maydell (6): hw/arm_boot.c: Make ram_size a target_phys_addr_t hw/arm_boot.c: Consistently use ram_size from arm_boot_info struct hw/arm_boot.c: Check for RAM sizes exceeding ATAGS capacity device_tree: Add support for reading device tree properties hw/arm_boot.c: Support DTBs which use 64 bit addresses hw/vexpress.c: Allow >4GB of RAM for Cortex-A15 daughterboard device_tree.c | 30 ++++++++++++++++++++++++++++++ device_tree.h | 4 ++++ hw/arm-misc.h | 2 +- hw/arm_boot.c | 46 +++++++++++++++++++++++++++++++++++++++++----- hw/vexpress.c | 13 ++++++++++--- 5 files changed, 86 insertions(+), 9 deletions(-)
