This series a WIP for adding full FEAT_MEC support to arm max cpu. It adds the FEAT_MEC registers but does not touch the translation regimes to support the MECIDs. I'm currently looking at the possibilies to support it in QEMU for the various translation regimes we have on Arm64.
Cheers, Gustavo Gustavo Romero (3): target/arm: Add the MECEn SCR_EL3 bit target/arm: Advertise FEAT_MEC in cpu max target/arm: Add FEAT_MEC registers docs/system/arm/emulation.rst | 1 + target/arm/cpu-features.h | 5 ++ target/arm/cpu.h | 15 ++++++ target/arm/helper.c | 98 +++++++++++++++++++++++++++++++++++ target/arm/tcg/cpu64.c | 1 + 5 files changed, 120 insertions(+) -- 2.34.1
