On 6/9/25 8:47 AM, Ben Dooks wrote:
On 09/06/2025 12:30, Daniel Henrique Barboza wrote:
On 6/9/25 7:40 AM, Ben Dooks wrote:
On 07/06/2025 21:17, Daniel Henrique Barboza wrote:
On 5/27/25 8:24 AM, Ben Dooks wrote:
Add TYPE_RISCV_CPU_CVA6 for the CVA6 core
Signed-off-by: Ben Dooks <ben.do...@codethink.co.uk>
---
target/riscv/cpu-qom.h | 1 +
target/riscv/cpu.c | 11 +++++++++++
2 files changed, 12 insertions(+)
diff --git a/target/riscv/cpu-qom.h b/target/riscv/cpu-qom.h
index 1ee05eb393..3daf75568c 100644
--- a/target/riscv/cpu-qom.h
+++ b/target/riscv/cpu-qom.h
@@ -34,6 +34,7 @@
#define TYPE_RISCV_CPU_BASE32 RISCV_CPU_TYPE_NAME("rv32")
#define TYPE_RISCV_CPU_BASE64 RISCV_CPU_TYPE_NAME("rv64")
#define TYPE_RISCV_CPU_BASE128 RISCV_CPU_TYPE_NAME("x- rv128")
+#define TYPE_RISCV_CPU_CVA6 RISCV_CPU_TYPE_NAME("cva6")
#define TYPE_RISCV_CPU_RV32I RISCV_CPU_TYPE_NAME("rv32i")
#define TYPE_RISCV_CPU_RV32E RISCV_CPU_TYPE_NAME("rv32e")
#define TYPE_RISCV_CPU_RV64I RISCV_CPU_TYPE_NAME("rv64i")
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 629ac37501..fca45dc9d9 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -3009,6 +3009,17 @@ static const TypeInfo riscv_cpu_type_infos[] = {
.misa_mxl_max = MXL_RV64,
),
+ DEFINE_RISCV_CPU(TYPE_RISCV_CPU_CVA6, TYPE_RISCV_VENDOR_CPU,
+ .misa_ext = RVI | RVM | RVA | RVF | RVD | RVC | RVB | RVS | RVU,
+ .misa_mxl_max = MXL_RV64,
+ .cfg.max_satp_mode = VM_1_10_SV39,
+ .priv_spec = PRIV_VERSION_1_12_0,
+ .cfg.pmp = true,
+ .cfg.mmu = true,
+ .cfg.ext_zifencei = true,
+ .cfg.ext_zicsr = true,
+ ),
+
The CPU is being added inside a "#if defined(TARGET_RISCV64)" block, meaning
that it's a 64-bit CPU only. But the CVA6 board added in patch 1 is being
added for both 32 and 64 bit emulations in hw/riscv/Kconfig:
Ah yes, it is possible to make a cva6 32bit, is it ok just to ove this
into a different place or is there anything else needed to allow 32 or 64bit?
I've only been building a 64bit userland to test so didn't notice the
lack of 32bit was an issue.
config CVA6
bool
default y
depends on RISCV32 || RISCV64 <------------------
This setup (after patch 3 is added) triggered a test failure in 'check- qtest',
when polling all available boards in qemu-system-riscv32, because it didn't find
a default 32 bit CPU for the cva6 board:
# starting QEMU: exec ./qemu-system-riscv32 -qtest unix:/tmp/
qtest-1683816.sock -qtest-log /dev/null -chardev socket,path=/tmp/
qtest-1683816.qmp,id=char0 -mon chardev=char0,mode=control -display none -audio
none -machine cva6 -accel qtest
----------------------------------- stderr -----------------------------------
qemu-system-riscv32: ../hw/core/machine.c:1574: is_cpu_type_supported:
Assertion `cc != NULL' failed.
Broken pipe
../tests/qtest/libqtest.c:208: kill_qemu() detected QEMU death from signal 6
(Aborted) (core dumped)
We have 2 options here:
- if the CVA6 board is supposed to run in RISCV32 and RISCV64, then its default
CPU must be 32 bit compliant too. The CPU declaration in this patch must be
moved
outside the "#if defined(TARGET_RISCV64)" block (e.g right after
TYPE_RISCV_CPU_SIFIVE_U);
- if the board is 64 bit only then the CPU declaration is fine, and we need to
change the board hw/riscv/Kconfig entry to "depends on RISCV64".
As long as it is just the #ifdef block I will move it.
I just read the CV6 documentation at:
https://github.com/openhwgroup/cva6/
The README states right at the start:
"CVA6 is a 6-stage, single-issue, in-order CPU which implements the 64- bit RISC-V
instruction set."
So this means that CVA6 is a 64-bit CPU only. This means that we want the second
option: the CPU declaration is fine, but the CVA6 board must be built only for
64
bits. In patch 1, this line:
There do seem to be some build variants for cva32a6 deep in the docs
and the cva6-sdk has builds for both xlen==32 and xlen==64 so I am a
bit confused here.
It looks like that the 32 bit version (which I assume to be this cva32a65x
target)
is not the same CPU as you're adding here. At least in a quick read at the docs.
Even if we move the CPU declaration as I've suggested, making this cva6 work 32
bit
compliant too, that doesn't mean that it'll have the intended purpose as per its
own spec.
My suggestion is to get a clarification with the cva6 folks (or any other
interested
party) about whether this is supposed to be a 64 bit only board/cpu or not. If
unsure, I suggest to contribute this as a 64 bit only CPU/board for now and then
revisit this later in case there's a 32 bit variant too.
Thanks,
Daniel
