On 5/8/2025 9:35 PM, Philippe Mathieu-Daudé wrote:
"wide" in fw_cfg_init_mem_wide() means "DMA support". Rename for clarity.
PS: at the time when fw_cfg_init_mem_wide() was first introcuded, 'wide' was exactly for data_width. see commit 6c87e3d5967a.
Suggested-by: Zhao Liu <zhao1....@intel.com> Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
with the usage in hw/loongarch/fw_cfg.c fixed, Reviewed-by: Xiaoyao Li <xiaoyao...@intel.com>
--- include/hw/nvram/fw_cfg.h | 6 +++--- hw/arm/virt.c | 2 +- hw/nvram/fw_cfg.c | 6 +++--- hw/riscv/virt.c | 4 ++-- 4 files changed, 9 insertions(+), 9 deletions(-) diff --git a/include/hw/nvram/fw_cfg.h b/include/hw/nvram/fw_cfg.h index d5161a79436..c4c49886754 100644 --- a/include/hw/nvram/fw_cfg.h +++ b/include/hw/nvram/fw_cfg.h @@ -309,9 +309,9 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint32_t dma_iobase, AddressSpace *dma_as); FWCfgState *fw_cfg_init_mem_nodma(hwaddr ctl_addr, hwaddr data_addr, unsigned data_width); -FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr, - hwaddr data_addr, uint32_t data_width, - hwaddr dma_addr, AddressSpace *dma_as); +FWCfgState *fw_cfg_init_mem_dma(hwaddr ctl_addr, + hwaddr data_addr, uint32_t data_width, + hwaddr dma_addr, AddressSpace *dma_as);FWCfgState *fw_cfg_find(void);bool fw_cfg_dma_enabled(void *opaque); diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 9a6cd085a37..7583f0a85d9 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1361,7 +1361,7 @@ static FWCfgState *create_fw_cfg(const VirtMachineState *vms, AddressSpace *as) FWCfgState *fw_cfg; char *nodename;- fw_cfg = fw_cfg_init_mem_wide(base + 8, base, 8, base + 16, as);+ fw_cfg = fw_cfg_init_mem_dma(base + 8, base, 8, base + 16, as); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)ms->smp.cpus);nodename = g_strdup_printf("/fw-cfg@%" PRIx64, base);diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 4067324fb09..51b028b5d0a 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -1087,9 +1087,9 @@ static FWCfgState *fw_cfg_init_mem_internal(hwaddr ctl_addr, return s; }-FWCfgState *fw_cfg_init_mem_wide(hwaddr ctl_addr,- hwaddr data_addr, uint32_t data_width, - hwaddr dma_addr, AddressSpace *dma_as) +FWCfgState *fw_cfg_init_mem_dma(hwaddr ctl_addr, + hwaddr data_addr, uint32_t data_width, + hwaddr dma_addr, AddressSpace *dma_as) { assert(dma_addr && dma_as); return fw_cfg_init_mem_internal(ctl_addr, data_addr, data_addr, diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index be1bf0f6468..3ddea18c93e 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -1266,8 +1266,8 @@ static FWCfgState *create_fw_cfg(const MachineState *ms) hwaddr base = virt_memmap[VIRT_FW_CFG].base; FWCfgState *fw_cfg;- fw_cfg = fw_cfg_init_mem_wide(base + 8, base, 8, base + 16,- &address_space_memory); + fw_cfg = fw_cfg_init_mem_dma(base + 8, base, 8, base + 16, + &address_space_memory); fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)ms->smp.cpus);return fw_cfg;
