From: Anisa Su <anisa...@samsung.com>
FM DCD Management command 0x5604 implemented per CXL r3.2 Spec Section 7.6.7.6.5
Signed-off-by: Anisa Su <anisa...@samsung.com>
---
hw/cxl/cxl-mailbox-utils.c | 195 +++++++++++++++++++++++++++++++++++
hw/mem/cxl_type3.c | 8 +-
include/hw/cxl/cxl_device.h | 4 +
include/hw/cxl/cxl_opcodes.h | 1 +
4 files changed, 204 insertions(+), 4 deletions(-)
diff --git a/hw/cxl/cxl-mailbox-utils.c b/hw/cxl/cxl-mailbox-utils.c
index a897a34ef9..9b176dea08 100644
--- a/hw/cxl/cxl-mailbox-utils.c
+++ b/hw/cxl/cxl-mailbox-utils.c
@@ -3589,6 +3589,194 @@ static CXLRetCode
cmd_fm_get_dc_region_extent_list(const struct cxl_cmd *cmd,
return CXL_MBOX_SUCCESS;
}
+static CXLRetCode cxl_mbox_dc_prescriptive_sanity_check(CXLType3Dev *dcd,
+ uint16_t host_id,
+ uint32_t ext_count,
+ CXLDCExtentRaw
extents[],
+ CXLDCEventType type)
+{
+ CXLDCExtentRaw ext;
+ CXLDCRegion *reg = NULL;
+ int i, j;
+
+ if (host_id != 0) {
+ return CXL_MBOX_INVALID_INPUT;
+ }
+
+ for (i = 0; i < ext_count; i++) {
+ ext = extents[i];
+
+ if (ext.len == 0) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+
+ reg = cxl_find_dc_region(dcd, ext.start_dpa, ext.len);
+ if (!reg) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+
+ if (ext.len % reg->block_size || ext.start_dpa % reg->block_size) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+
+ /* Check requested extents do not overlap with each other. */
+ for (j = i + 1; j < ext_count; j++) {
+ if (ranges_overlap(ext.start_dpa, ext.len, extents[j].start_dpa,
+ extents[j].len)) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+ }
+
+ if (type == DC_EVENT_ADD_CAPACITY) {
+ /* Check requested extents do not overlap with pending extents. */
+ if (cxl_extent_groups_overlaps_dpa_range(&dcd->dc.extents_pending,
+ ext.start_dpa, ext.len)) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+ /* Check requested extents do not overlap with existing extents. */
+ if (cxl_extents_overlaps_dpa_range(&dcd->dc.extents,
+ ext.start_dpa, ext.len)) {
+ return CXL_MBOX_INVALID_EXTENT_LIST;
+ }
+ }
+ }
+
+ return CXL_MBOX_SUCCESS;
+}
+
+static int cxl_mbox_get_pending_ext_count(CXLType3Dev *ct3d)
+{
+ CXLDCExtentGroup *group;
+ CXLDCExtentList *list;
+ CXLDCExtent *ent;
+ int count = 0;
+
+ QTAILQ_FOREACH(group, &ct3d->dc.extents_pending, node) {
+ list = &group->list;
+ QTAILQ_FOREACH(ent, list, node) {
+ count++;
+ }
+ }
+
+ return count;
+}
+
+static int cxl_mbox_get_accepted_ext_count(CXLType3Dev *ct3d)
+{
+ CXLDCExtent *ent;
+ int count = 0;
+
+ QTAILQ_FOREACH(ent, &ct3d->dc.extents, node) {
+ count++;
+ }
+
+ return count;
+}
+
+static void cxl_mbox_dc_add_to_pending(CXLType3Dev *ct3d,
+ uint32_t ext_count,
+ CXLDCExtentRaw extents[])
+{
+ CXLDCExtentGroup *group = NULL;
+ int i;
+
+ for (i = 0; i < ext_count; i++) {
+ group = cxl_insert_extent_to_extent_group(group,
+ extents[i].start_dpa,
+ extents[i].len,
+ extents[i].tag,
+ extents[i].shared_seq);
+ }
+
+ cxl_extent_group_list_insert_tail(&ct3d->dc.extents_pending, group);
+}
+
+static void cxl_mbox_create_dc_event_records_for_extents(CXLType3Dev *ct3d,
+ CXLDCEventType type,
+ CXLDCExtentRaw
extents[],
+ uint32_t ext_count)
+{
+ CXLEventDynamicCapacity event_rec = {};
+ int i;
+
+ cxl_mbox_dc_event_create_record_hdr(ct3d, &event_rec.hdr);
+ event_rec.type = type;
+ event_rec.validity_flags = 1;
+ event_rec.host_id = 0;
+ event_rec.updated_region_id = 0;
+ event_rec.extents_avail = ct3d->dc.total_extent_count -
+ cxl_mbox_get_accepted_ext_count(ct3d) -
+ cxl_mbox_get_pending_ext_count(ct3d);
+
+ for (i = 0; i < ext_count; i++) {
+ memcpy(&event_rec.dynamic_capacity_extent,
+ &extents[i],
+ sizeof(CXLDCExtentRaw));
+ event_rec.flags = 0;
+ if (i < ext_count - 1) {
+ /* Set "More" flag */
+ event_rec.flags |= BIT(0);
+ }
+
+ if (cxl_event_insert(&ct3d->cxl_dstate,
+ CXL_EVENT_TYPE_DYNAMIC_CAP,
+ (CXLEventRecordRaw *)&event_rec)) {
+ cxl_event_irq_assert(ct3d);
+ }
+ }
+}
+
+/* CXL r3.2 Section 7.6.7.6.5 Initiate Dynamic Capacity Add (Opcode 5604h) */
+static CXLRetCode cmd_fm_initiate_dc_add(const struct cxl_cmd *cmd,
+ uint8_t *payload_in,
+ size_t len_in,
+ uint8_t *payload_out,
+ size_t *len_out,
+ CXLCCI *cci)
+{
+ struct {
+ uint16_t host_id;
+ uint8_t selection_policy;
+ uint8_t reg_num;
+ uint64_t length;
+ uint8_t tag[0x10];
+ uint32_t ext_count;
+ CXLDCExtentRaw extents[];
+ } QEMU_PACKED *in = (void *)payload_in;
+ CXLType3Dev *ct3d = CXL_TYPE3(cci->d);
+ int rc;
+
+ switch (in->selection_policy) {
+ case CXL_EXTENT_SELECTION_POLICY_PRESCRIPTIVE:
+ /* Adding extents exceeds device's extent tracking ability. */
+ if (in->ext_count + ct3d->dc.total_extent_count >
+ CXL_NUM_EXTENTS_SUPPORTED) {
+ return CXL_MBOX_RESOURCES_EXHAUSTED;
+ }
+ rc = cxl_mbox_dc_prescriptive_sanity_check(ct3d,
+ in->host_id,
+ in->ext_count,
+ in->extents,
+ DC_EVENT_ADD_CAPACITY);
+ if (rc) {
+ return rc;
+ }
+ cxl_mbox_dc_add_to_pending(ct3d, in->ext_count, in->extents);
+ cxl_mbox_create_dc_event_records_for_extents(ct3d,
+ DC_EVENT_ADD_CAPACITY,
+ in->extents,
+ in->ext_count);
+
+ return CXL_MBOX_SUCCESS;
+ default:
+ qemu_log_mask(LOG_UNIMP,
+ "CXL extent selection policy not supported.\n");
+ return CXL_MBOX_INVALID_INPUT;
+ }
+
+ return CXL_MBOX_SUCCESS;
+}
+
static const struct cxl_cmd cxl_cmd_set[256][256] = {
[INFOSTAT][BACKGROUND_OPERATION_ABORT] = { "BACKGROUND_OPERATION_ABORT",
cmd_infostat_bg_op_abort, 0, 0 },
@@ -3724,6 +3912,13 @@ static const struct cxl_cmd cxl_cmd_set_fm_dcd[256][256]
= {
CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
[FMAPI_DCD_MGMT][GET_DC_REGION_EXTENT_LIST] = {
"GET_DC_REGION_EXTENT_LIST",
cmd_fm_get_dc_region_extent_list, 12, 0 },
+ [FMAPI_DCD_MGMT][INITIATE_DC_ADD] = { "INIT_DC_ADD",
+ cmd_fm_initiate_dc_add, ~0,
+ (CXL_MBOX_CONFIG_CHANGE_COLD_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CONV_RESET |
+ CXL_MBOX_CONFIG_CHANGE_CXL_RESET |
+ CXL_MBOX_IMMEDIATE_CONFIG_CHANGE |
+ CXL_MBOX_IMMEDIATE_DATA_CHANGE) },
};
/*
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index edc29f1ccb..71fad3391c 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1991,8 +1991,8 @@ void qmp_cxl_inject_memory_module_event(const char *path,
CxlEventLog log,
* the list.
* Return value: return true if has overlaps; otherwise, return false
*/
-static bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
- uint64_t dpa, uint64_t len)
+bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
+ uint64_t dpa, uint64_t len)
{
CXLDCExtent *ent;
Range range1, range2;
@@ -2037,8 +2037,8 @@ bool cxl_extents_contains_dpa_range(CXLDCExtentList *list,
return false;
}
-static bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
- uint64_t dpa, uint64_t len)
+bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
+ uint64_t dpa, uint64_t len)
{
CXLDCExtentGroup *group;
diff --git a/include/hw/cxl/cxl_device.h b/include/hw/cxl/cxl_device.h
index 22823e2054..93b6df0ccd 100644
--- a/include/hw/cxl/cxl_device.h
+++ b/include/hw/cxl/cxl_device.h
@@ -824,4 +824,8 @@ bool ct3_test_region_block_backed(CXLType3Dev *ct3d,
uint64_t dpa,
void cxl_assign_event_header(CXLEventRecordHdr *hdr,
const QemuUUID *uuid, uint32_t flags,
uint8_t length, uint64_t timestamp);
+bool cxl_extents_overlaps_dpa_range(CXLDCExtentList *list,
+ uint64_t dpa, uint64_t len);
+bool cxl_extent_groups_overlaps_dpa_range(CXLDCExtentGroupList *list,
+ uint64_t dpa, uint64_t len);
#endif
diff --git a/include/hw/cxl/cxl_opcodes.h b/include/hw/cxl/cxl_opcodes.h
index ad4e614daa..72ea0a7d44 100644
--- a/include/hw/cxl/cxl_opcodes.h
+++ b/include/hw/cxl/cxl_opcodes.h
@@ -66,5 +66,6 @@ enum {
#define GET_HOST_DC_REGION_CONFIG 0x1
#define SET_DC_REGION_CONFIG 0x2
#define GET_DC_REGION_EXTENT_LIST 0x3
+ #define INITIATE_DC_ADD 0x4
GLOBAL_MEMORY_ACCESS_EP_MGMT = 0X59
};
--
2.47.2
