Move the chipset reset which is pegasos2 specific out from machine reset to a separate function and move parts not specific to pegasos2 form build_fdt in machine reset so now build_fdt contains pegasos2 specific parts and renamed accordingly.
Signed-off-by: BALATON Zoltan <bala...@eik.bme.hu> --- hw/ppc/pegasos2.c | 79 ++++++++++++++++++++++++----------------------- 1 file changed, 41 insertions(+), 38 deletions(-) diff --git a/hw/ppc/pegasos2.c b/hw/ppc/pegasos2.c index 26a571f82e..e3c1ee9347 100644 --- a/hw/ppc/pegasos2.c +++ b/hw/ppc/pegasos2.c @@ -57,10 +57,6 @@ #define BUS_FREQ_HZ 133333333 -#define PCI0_CFG_ADDR 0xcf8 -#define PCI1_CFG_ADDR 0xc78 -#define PCI1_IO_BASE 0xfe000000 - #define TYPE_PEGASOS2_MACHINE MACHINE_TYPE_NAME("pegasos2") OBJECT_DECLARE_TYPE(Pegasos2MachineState, MachineClass, PEGASOS2_MACHINE) @@ -82,7 +78,7 @@ struct Pegasos2MachineState { uint64_t initrd_size; }; -static void *build_fdt(MachineState *machine, int *fdt_size); +static void *pegasos2_build_fdt(Pegasos2MachineState *pm, int *fdt_size); static void pegasos2_cpu_reset(void *opaque) { @@ -284,6 +280,9 @@ static void pegasos2_mv_reg_write(Pegasos2MachineState *pm, uint32_t addr, MEMTXATTRS_UNSPECIFIED); } +#define PCI0_CFG_ADDR 0xcf8 +#define PCI1_CFG_ADDR 0xc78 + static uint32_t pegasos2_pci_config_read(Pegasos2MachineState *pm, int bus, uint32_t addr, uint32_t len) { @@ -308,23 +307,12 @@ static void pegasos2_pci_config_write(Pegasos2MachineState *pm, int bus, static void pegasos2_superio_write(uint8_t addr, uint8_t val) { - cpu_physical_memory_write(PCI1_IO_BASE + 0x3f0, &addr, 1); - cpu_physical_memory_write(PCI1_IO_BASE + 0x3f1, &val, 1); + cpu_physical_memory_write(0xfe0003f0, &addr, 1); + cpu_physical_memory_write(0xfe0003f1, &val, 1); } -static void pegasos2_machine_reset(MachineState *machine, ResetType type) +static void pegasos2_chipset_reset(Pegasos2MachineState *pm) { - Pegasos2MachineState *pm = PEGASOS2_MACHINE(machine); - void *fdt; - uint64_t d[2]; - int sz; - - qemu_devices_reset(type); - if (!pm->vof) { - return; /* Firmware should set up machine so nothing to do */ - } - - /* Otherwise, set up devices that board firmware would normally do */ pegasos2_mv_reg_write(pm, 0, 4, 0x28020ff); pegasos2_mv_reg_write(pm, 0x278, 4, 0xa31fc); pegasos2_mv_reg_write(pm, 0xf300, 4, 0x11ff0400); @@ -387,6 +375,23 @@ static void pegasos2_machine_reset(MachineState *machine, ResetType type) pegasos2_pci_config_write(pm, 1, (PCI_DEVFN(12, 6) << 8) | PCI_INTERRUPT_LINE, 2, 0x309); +} + +static void pegasos2_machine_reset(MachineState *machine, ResetType type) +{ + Pegasos2MachineState *pm = PEGASOS2_MACHINE(machine); + void *fdt; + uint32_t c[2]; + uint64_t d[2]; + int sz; + + qemu_devices_reset(type); + if (!pm->vof) { + return; /* Firmware should set up machine so nothing to do */ + } + + /* Otherwise, set up devices that board firmware would normally do */ + pegasos2_chipset_reset(pm); /* Device tree and VOF set up */ vof_init(pm->vof, machine->ram_size, &error_fatal); @@ -405,10 +410,25 @@ static void pegasos2_machine_reset(MachineState *machine, ResetType type) exit(1); } - fdt = build_fdt(machine, &sz); + fdt = pegasos2_build_fdt(pm, &sz); if (!fdt) { exit(1); } + + /* Set memory size */ + c[0] = 0; + c[1] = cpu_to_be32(machine->ram_size); + qemu_fdt_setprop(fdt, "/memory@0", "reg", c, sizeof(c)); + + /* Boot parameters */ + if (pm->initrd_addr && pm->initrd_size) { + qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end", + pm->initrd_addr + pm->initrd_size); + qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start", + pm->initrd_addr); + } + qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", + machine->kernel_cmdline ?: ""); /* FIXME: VOF assumes entry is same as load address */ d[0] = cpu_to_be64(pm->kernel_entry); d[1] = cpu_to_be64(pm->kernel_size - (pm->kernel_entry - pm->kernel_addr)); @@ -828,12 +848,10 @@ static void *load_dtb(const char *filename, int *fdt_size) return fdt; } -static void *build_fdt(MachineState *machine, int *fdt_size) +static void *pegasos2_build_fdt(Pegasos2MachineState *pm, int *fdt_size) { - Pegasos2MachineState *pm = PEGASOS2_MACHINE(machine); FDTInfo fi; PCIBus *pci_bus; - uint32_t cells[2]; void *fdt = load_dtb("pegasos2.dtb", fdt_size); if (!fdt) { @@ -841,21 +859,6 @@ static void *build_fdt(MachineState *machine, int *fdt_size) } qemu_fdt_setprop_string(fdt, "/", "name", "bplan,Pegasos2"); - /* Set memory size */ - cells[0] = 0; - cells[1] = cpu_to_be32(machine->ram_size); - qemu_fdt_setprop(fdt, "/memory@0", "reg", cells, 2 * sizeof(cells[0])); - - /* Boot parameters */ - if (pm->initrd_addr && pm->initrd_size) { - qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-end", - pm->initrd_addr + pm->initrd_size); - qemu_fdt_setprop_cell(fdt, "/chosen", "linux,initrd-start", - pm->initrd_addr); - } - qemu_fdt_setprop_string(fdt, "/chosen", "bootargs", - machine->kernel_cmdline ?: ""); - add_cpu_info(fdt, pm->cpu); fi.fdt = fdt; -- 2.41.3