On 2025/4/29 14:28, Corvin Köhne wrote:
> On Tue, 2025-04-29 at 00:10 +0800, Tomita Moeko wrote:
>> CAUTION: External Email!!
>> x-igd-gms is used for overriding DSM region size in GGC register in
>> both config space and MMIO BAR0, by default host value is used.
>> There is no need to emulate it in default case.
>>
>> Signed-off-by: Tomita Moeko <tomitamo...@gmail.com>
>>
>
> Is the GGC register writeable after UEFI or is it locked? If it's writable,
> I'm
> wondering what might happen if the guest writes to the GGC register to
> increase
> DSM region size.
>
The document says its is read-only mirror to the Graphics Control register
in Host bridge (00:00.0). In guest, the register being mirrored does not
exist, and GCC seems to be a scratch register that only used by software.
GOP driver setup DSM according to the value emulated by QEMU, this can be
confirmed with intel_gtt tool in intel-gpu-tools.
Setting GMS to 128MB do solves the strange issue that screen flickers on
4k60Hz display when host value is 64MB. Since the GOP driver is closed-
source, I am unable to explain this, but it works.
Memory view of IGD passthrough looks like below. The emulated GGC register
is responsible for the size of Guest DSM region, there is no impact to the
host side.
IGD Addr Space Host Addr Space Guest Addr Space
+-------------+ +-------------+ +-------------+
| | | | | |
| | | | | |
| | +-------------+ +-------------+
| | | Data Stolen | | Data Stolen |
| | | (Guest) | | (Guest) |
| |
+------------>+-------------+<------->+-------------+<--Guest BDSM
| | | Passthrough | | EPT | |
Emulated by QEMU
DSMSIZE+-------------+ | with IOMMU | | Mapping | |
Programmed by guest FW
| | | | | | |
| | | | | | |
0+-------------+--+ | | | |
| +-------------+ | |
| | Data Stolen | +-------------+
| | (Host) |
+------------>+-------------+<--Host BDSM
Non- | | "real" one in HW
Passthrough | | Programmed by host FW
+-------------+
Thanks,
Moeko
