Am 11. April 2025 03:53:27 UTC schrieb Guenter Roeck <li...@roeck-us.net>:
>On 4/8/25 14:56, Bernhard Beschow wrote:
>
>>>>> Tt turns out that sabrelite has the same problem.
>>>>
>>>> Did it work with QEMU 9.2?
>>>>
>>>
>>> No, the pcie interfaces on sabrelite don't instantiate for me with qemu 9.2
>>> (9.2.3,
>>> more specifically). I see the pcie root port, but nothing behind it.
>>
>> You need to add `bus=dw-pcie` to the pci devices' options in QEMU 9.2.x and
>> earler, otherwise it will end up on the wrong bus. This is fixed in master.
>>
>
>Just to give you a quick update, I needed the diff below to get virtio-net-pci
>to work on sabrelite.
>
>No luck with any other non-virtio PCI controllers, though.
>
>Guenter
>
>---
>diff --git a/include/hw/arm/fsl-imx6.h b/include/hw/arm/fsl-imx6.h
>index 9da32fc189..7325f3f2c4 100644
>--- a/include/hw/arm/fsl-imx6.h
>+++ b/include/hw/arm/fsl-imx6.h
>@@ -456,10 +456,10 @@ struct FslIMX6State {
> #define FSL_IMX6_MLB150_LOW_IRQ 117
> #define FSL_IMX6_ENET_MAC_IRQ 118
> #define FSL_IMX6_ENET_MAC_1588_IRQ 119
>-#define FSL_IMX6_PCIE1_IRQ 120
>-#define FSL_IMX6_PCIE2_IRQ 121
>-#define FSL_IMX6_PCIE3_IRQ 122
>-#define FSL_IMX6_PCIE4_MSI_IRQ 123
>+#define FSL_IMX6_PCIE1_IRQ 123
>+#define FSL_IMX6_PCIE2_IRQ 122
>+#define FSL_IMX6_PCIE3_IRQ 121
>+#define FSL_IMX6_PCIE4_MSI_IRQ 120
> #define FSL_IMX6_DCIC1_IRQ 124
> #define FSL_IMX6_DCIC2_IRQ 125
> #define FSL_IMX6_MLB150_HIGH_IRQ 126
>
Yeah, that matches the device tree. Mind sending a patch?
