Hi Richard, Here is my patch queue based on your tcg-next tree fixed.
You can find it on my repository: https://gitlab.com/philmd/qemu/-/tags/tcgops-mttcg-v4 Thanks, Phil. Since v3: - Include Brian's patch - Fix TCGCPUOps::mttcg_supported on x86/riscv Since v2: - Rebased & addressed review comments Since v1: - Deferred warning change and updated desc (patches 40 & 42) Brian Cain (1): target/hexagon: Add memory order definition Philippe Mathieu-Daudé (15): target/riscv: Remove AccelCPUClass::cpu_class_init need target/i386: Remove AccelCPUClass::cpu_class_init need accel: Remove AccelCPUClass::cpu_class_init() callback tcg: Always define TCG_GUEST_DEFAULT_MO tcg: Simplify tcg_req_mo() macro tcg: Define guest_default_memory_order in TCGCPUOps tcg: Remove use of TCG_GUEST_DEFAULT_MO in tb_gen_code() tcg: Propagate CPUState argument to cpu_req_mo() tcg: Have tcg_req_mo() use TCGCPUOps::guest_default_memory_order tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally tcg: Move cpu_req_mo() macro to target-agnostic 'backend-ldst.h' tcg: Move qemu_tcg_mttcg_enabled() to 'system/tcg.h' tcg: Convert TCGState::mttcg_enabled to TriState tcg: Factor mttcg_init() out tcg: Convert TARGET_SUPPORTS_MTTCG to TCGCPUOps::mttcg_supported field docs/devel/multi-thread-tcg.rst | 6 +- configs/targets/aarch64-softmmu.mak | 1 - configs/targets/alpha-softmmu.mak | 1 - configs/targets/arm-softmmu.mak | 1 - configs/targets/hppa-softmmu.mak | 1 - configs/targets/i386-softmmu.mak | 1 - configs/targets/loongarch64-softmmu.mak | 1 - configs/targets/microblaze-softmmu.mak | 1 - configs/targets/microblazeel-softmmu.mak | 1 - configs/targets/mips-softmmu.mak | 1 - configs/targets/mipsel-softmmu.mak | 1 - configs/targets/or1k-softmmu.mak | 1 - configs/targets/ppc64-softmmu.mak | 1 - configs/targets/riscv32-softmmu.mak | 1 - configs/targets/riscv64-softmmu.mak | 1 - configs/targets/s390x-softmmu.mak | 1 - configs/targets/sparc-softmmu.mak | 1 - configs/targets/sparc64-softmmu.mak | 1 - configs/targets/x86_64-softmmu.mak | 1 - configs/targets/xtensa-softmmu.mak | 1 - configs/targets/xtensaeb-softmmu.mak | 1 - accel/tcg/backend-ldst.h | 41 ++++++++++++ accel/tcg/internal-target.h | 35 ---------- include/accel/accel-cpu-target.h | 1 - include/accel/tcg/cpu-ops.h | 16 +++++ include/exec/poison.h | 2 - include/hw/core/cpu.h | 9 --- include/system/tcg.h | 8 +++ target/alpha/cpu-param.h | 3 - target/arm/cpu-param.h | 3 - target/avr/cpu-param.h | 2 - target/hppa/cpu-param.h | 8 --- target/i386/cpu-param.h | 3 - target/i386/tcg/tcg-cpu.h | 4 ++ target/loongarch/cpu-param.h | 2 - target/microblaze/cpu-param.h | 3 - target/mips/cpu-param.h | 2 - target/openrisc/cpu-param.h | 2 - target/ppc/cpu-param.h | 2 - target/riscv/cpu-param.h | 2 - target/riscv/tcg/tcg-cpu.h | 2 + target/s390x/cpu-param.h | 6 -- target/sparc/cpu-param.h | 23 ------- target/xtensa/cpu-param.h | 3 - accel/accel-target.c | 3 - accel/tcg/cputlb.c | 21 +++--- accel/tcg/tcg-all.c | 84 ++++++++++++++---------- accel/tcg/translate-all.c | 6 +- accel/tcg/user-exec.c | 21 +++--- target/alpha/cpu.c | 4 ++ target/arm/cpu.c | 4 ++ target/arm/tcg/cpu-v7m.c | 4 ++ target/avr/cpu.c | 2 + target/hexagon/cpu.c | 5 ++ target/hppa/cpu.c | 9 +++ target/i386/cpu.c | 4 ++ target/i386/tcg/tcg-cpu.c | 20 ++---- target/loongarch/cpu.c | 3 + target/m68k/cpu.c | 4 ++ target/microblaze/cpu.c | 4 ++ target/mips/cpu.c | 3 + target/openrisc/cpu.c | 3 + target/ppc/cpu_init.c | 2 + target/riscv/cpu.c | 3 + target/riscv/tcg/tcg-cpu.c | 20 ++---- target/rx/cpu.c | 4 ++ target/s390x/cpu.c | 7 ++ target/sh4/cpu.c | 4 ++ target/sparc/cpu.c | 24 +++++++ target/tricore/cpu.c | 3 + target/xtensa/cpu.c | 4 ++ tcg/region.c | 4 +- 72 files changed, 260 insertions(+), 227 deletions(-) create mode 100644 accel/tcg/backend-ldst.h -- 2.47.1
