On 3/17/2025 1:43 PM, ltaylorsimp...@gmail.com wrote:
-----Original Message----- From: Brian Cain <brian.c...@oss.qualcomm.com> Sent: Friday, February 28, 2025 11:28 PM To: qemu-devel@nongnu.org Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; a...@rev.ng; quic_mlie...@quicinc.com; ltaylorsimp...@gmail.com; alex.ben...@linaro.org; quic_mbur...@quicinc.com; sidn...@quicinc.com; Brian Cain <bc...@quicinc.com> Subject: [PATCH 08/39] target/hexagon: Implement get_exe_mode() From: Brian Cain <bc...@quicinc.com> Signed-off-by: Brian Cain <brian.c...@oss.qualcomm.com>diff --git a/target/hexagon/cpu_helper.c b/target/hexagon/cpu_helper.c index e64568b9fc..e0dd120cd4 100644 --- a/target/hexagon/cpu_helper.c +++ b/target/hexagon/cpu_helper.c @@ -237,6 +237,30 @@ void hexagon_ssr_set_cause(CPUHexagonState *env, uint32_t cause) int get_exe_mode(CPUHexagonState *env) { + g_assert(bql_locked()); + + target_ulong modectl = arch_get_system_reg(env, HEX_SREG_MODECTL); + uint32_t thread_enabled_mask = GET_FIELD(MODECTL_E, modectl); + bool E_bit = thread_enabled_mask & (0x1 << env->threadId); + uint32_t thread_wait_mask = GET_FIELD(MODECTL_W, modectl); + bool W_bit = thread_wait_mask & (0x1 << env->threadId); + target_ulong isdbst = arch_get_system_reg(env, HEX_SREG_ISDBST); + uint32_t debugmode = GET_FIELD(ISDBST_DEBUGMODE, isdbst); + bool D_bit = debugmode & (0x1 << env->threadId); + + /* Figure 4-2 */Figure 4-2 in which document?
I don't think that document with this figure is published. I'll just remove the reference instead.
Otherwise Reviewed-by: Taylor Simpson <ltaylorsimp...@gmail.com>
