On 3/12/2025 2:19 PM, Philippe Mathieu-Daudé wrote:
On 1/3/25 06:26, Brian Cain wrote:
From: Brian Cain <bc...@quicinc.com>
Signed-off-by: Brian Cain <brian.c...@oss.qualcomm.com>
---
target/hexagon/cpu.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 36a93cc22f..2b6a707fca 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -26,6 +26,7 @@
#include "fpu/softfloat-helpers.h"
#include "tcg/tcg.h"
#include "exec/gdbstub.h"
+#include "cpu_helper.h"
static void hexagon_v66_cpu_init(Object *obj) { }
static void hexagon_v67_cpu_init(Object *obj) { }
@@ -290,11 +291,18 @@ static void hexagon_cpu_reset_hold(Object *obj,
ResetType type)
set_float_default_nan_pattern(0b11111111, &env->fp_status);
#ifndef CONFIG_USER_ONLY
+ HexagonCPU *cpu = HEXAGON_CPU(cs);
+
if (cs->cpu_index == 0) {
This doesn't scale to heterogeneous emulation.
If we have a target-specific index here (instead of cpu_index) guarding
the "g_sreg" allocation shared by these Hexagon vCPUs, does that
suffice? Or is the problem the shared allocation itself?
Could a heterogeneous emulation configuration consist of multiple
instances of (same-architecture) vCPU-groups?
memset(env->g_sreg, 0, sizeof(target_ulong) * NUM_SREGS);
}
memset(env->t_sreg, 0, sizeof(target_ulong) * NUM_SREGS);
memset(env->greg, 0, sizeof(target_ulong) * NUM_GREGS);
+
+ if (cs->cpu_index == 0) {
Ditto.
+ arch_set_system_reg(env, HEX_SREG_MODECTL, 0x1);
+ }
+ arch_set_system_reg(env, HEX_SREG_HTID, cs->cpu_index);
#endif
}