> -----Original Message----- > From: ltaylorsimp...@gmail.com <ltaylorsimp...@gmail.com> > Sent: Tuesday, March 11, 2025 6:27 PM > To: 'Brian Cain' <brian.c...@oss.qualcomm.com>; qemu-devel@nongnu.org > Cc: richard.hender...@linaro.org; phi...@linaro.org; Matheus Bernardino > (QUIC) <quic_mathb...@quicinc.com>; a...@rev.ng; a...@rev.ng; Marco > Liebel (QUIC) <quic_mlie...@quicinc.com>; alex.ben...@linaro.org; Mark > Burton (QUIC) <quic_mbur...@quicinc.com>; Sid Manning > <sidn...@quicinc.com>; Brian Cain <bc...@quicinc.com> > Subject: RE: [PATCH 28/38] target/hexagon: Initialize htid, modectl regs > > WARNING: This email originated from outside of Qualcomm. Please be wary > of any links or attachments, and do not enable macros. > > > -----Original Message----- > > From: Brian Cain <brian.c...@oss.qualcomm.com> > > Sent: Friday, February 28, 2025 11:26 PM > > To: qemu-devel@nongnu.org > > Cc: brian.c...@oss.qualcomm.com; richard.hender...@linaro.org; > > phi...@linaro.org; quic_mathb...@quicinc.com; a...@rev.ng; > a...@rev.ng; > > quic_mlie...@quicinc.com; ltaylorsimp...@gmail.com; > > alex.ben...@linaro.org; quic_mbur...@quicinc.com; > sidn...@quicinc.com; > > Brian Cain <bc...@quicinc.com> > > Subject: [PATCH 28/38] target/hexagon: Initialize htid, modectl regs > > > > From: Brian Cain <bc...@quicinc.com> > > > > Signed-off-by: Brian Cain <brian.c...@oss.qualcomm.com> > > --- > > target/hexagon/cpu.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index > > 36a93cc22f..2b6a707fca 100644 > > --- a/target/hexagon/cpu.c > > +++ b/target/hexagon/cpu.c > > @@ -26,6 +26,7 @@ > > #include "fpu/softfloat-helpers.h" > > #include "tcg/tcg.h" > > #include "exec/gdbstub.h" > > +#include "cpu_helper.h" > > > > static void hexagon_v66_cpu_init(Object *obj) { } static void > > hexagon_v67_cpu_init(Object *obj) { } @@ -290,11 +291,18 @@ static > > void hexagon_cpu_reset_hold(Object *obj, ResetType type) > > set_float_default_nan_pattern(0b11111111, &env->fp_status); > > > > #ifndef CONFIG_USER_ONLY > > + HexagonCPU *cpu = HEXAGON_CPU(cs); > > + > > if (cs->cpu_index == 0) { > > memset(env->g_sreg, 0, sizeof(target_ulong) * NUM_SREGS); > > } > > memset(env->t_sreg, 0, sizeof(target_ulong) * NUM_SREGS); > > memset(env->greg, 0, sizeof(target_ulong) * NUM_GREGS); > > + > > + if (cs->cpu_index == 0) { > > + arch_set_system_reg(env, HEX_SREG_MODECTL, 0x1); > > + } > > Combine with previous check cs->cpu_index == 0? [Sid Manning]
Yes, will make that change, thanks! > > > + arch_set_system_reg(env, HEX_SREG_HTID, cs->cpu_index); > > #endif > > } > > Otherwise > Reviewed-by: Taylor Simpson <ltaylorsimp...@gmail.com> >