On Wed Feb 26, 2025 at 5:38 AM AEST, Richard Henderson wrote: > On 2/25/25 11:33, Richard Henderson wrote: >> On 2/25/25 10:46, Alex Bennée wrote: >>> @@ -191,7 +199,7 @@ static void hppa_cpu_realizefn(DeviceState *dev, Error >>> **errp) >>> cpu->alarm_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, >>> hppa_cpu_alarm_timer, cpu); >>> - hppa_ptlbe(&cpu->env); >>> + async_run_on_cpu(cs, hppa_clear_ptlbe, >>> RUN_ON_CPU_HOST_PTR(&cpu->env)); >> >> Nack, this is emulation of hardware, not softmmu. > > Hmm. I see what you're thinking about though: this function, after resetting > the data > structures associated with the hardware emulation, also calls the softmmu > flush. > > If we absolutely need to do so, I suppose delaying the hardware emulation > flush to the > work queue isn't the worst solution. This is where the hppa patch is more > correct than > the ppc patch which completely eliminated the hardware emulation flush.
Could we expose a function that performs the hardware state reset, and leave the TCG flushing to the TCG CPU reset? Thanks, Nick
