To avoid any translation faults, the IOMMUs are expected to be reset after the devices they protect. Document that we expect DMA requests to be stopped during the 'enter' or 'hold' phase while IOMMUs should be reset during the 'exit' phase.
Signed-off-by: Eric Auger <eric.au...@redhat.com> --- docs/devel/reset.rst | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/docs/devel/reset.rst b/docs/devel/reset.rst index adefd59ef9..0b8b2fa5f4 100644 --- a/docs/devel/reset.rst +++ b/docs/devel/reset.rst @@ -143,6 +143,11 @@ The *exit* phase is executed only when the last reset operation ends. Therefore the object does not need to care how many of reset controllers it has and how many of them have started a reset. +DMA capable devices are expected to cancel all outstanding DMA operations +during either 'enter' or 'hold' phases. IOMMUs are expected to reset during +the 'exit' phase and this sequencing makes sure no outstanding DMA request +will fault. + Handling reset in a resettable object ------------------------------------- -- 2.47.1
