Since v2:
- Addressed Richard comments, tricore not disingenuously modified.
Since v1:
- Addressed Thomas & Richard comments
Targets are aware of their endianness. No need for a global
target_words_bigendian() call in disas/ where we call the
CPUClass::disas_set_info() handler which already update
disassemble_info fields. Specify the target endianness in
each CPUClass handler.
Philippe Mathieu-Daudé (10):
target: Set disassemble_info::endian value for little-endian targets
target: Set disassemble_info::endian value for big-endian targets
target/arm: Set disassemble_info::endian value in disas_set_info()
target/microblaze: Set disassemble_info::endian value in
disas_set_info
target/mips: Set disassemble_info::endian value in disas_set_info()
target/ppc: Set disassemble_info::endian value in disas_set_info()
target/riscv: Set disassemble_info::endian value in disas_set_info()
target/sh4: Set disassemble_info::endian value in disas_set_info()
target/xtensa: Set disassemble_info::endian value in disas_set_info()
disas: Remove target_words_bigendian() call in
initialize_debug_target()
disas/disas-common.c | 8 ++------
target/alpha/cpu.c | 1 +
target/arm/cpu.c | 10 +++-------
target/avr/cpu.c | 1 +
target/hexagon/cpu.c | 1 +
target/hppa/cpu.c | 1 +
target/i386/cpu.c | 1 +
target/loongarch/cpu.c | 1 +
target/m68k/cpu.c | 1 +
target/microblaze/cpu.c | 2 ++
target/mips/cpu.c | 10 +++++-----
target/openrisc/cpu.c | 1 +
target/ppc/cpu_init.c | 2 ++
target/riscv/cpu.c | 9 +++++++++
target/rx/cpu.c | 1 +
target/s390x/cpu.c | 1 +
target/sh4/cpu.c | 2 ++
target/sparc/cpu.c | 1 +
target/xtensa/cpu.c | 2 ++
19 files changed, 38 insertions(+), 18 deletions(-)
--
2.47.1
