On Tue Jan 7, 2025 at 8:00 AM AEST, Cédric Le Goater wrote: > Hello, > > On 12/10/24 04:04, Nicholas Piggin wrote: > > This series makes a bunch of fixes and improvements to the HOMER and > > OCC unit models for powernv. It gets OPAL OCC code happier again, > > Nice. I had similar changes exposing pstates and sensors for QEMU. > I am glad this is now possible. > > > but requires this series of skiboot fixes (which I will hope to get > > upstream and then into QEMU in the same release as this series is > > merged. > > > > https://lists.ozlabs.org/pipermail/skiboot/2024-November/019013.html > > > > Big changes is moving HOMER from mmio register implementation to a > > RAM memory region which better maches hardware and is much easier to > > work with; and the addition of some dynamic OCC behaviour to the > > device model. > > > > I wouldn't expect any review of OCC details. It's neglected and this > > series gets it in better shape than before. But anything on the > > basic structure and QEMU details is welcome. I will add some test > > cases to help ensure it doesn't regress in future, I will have to > > juggle the skiboot fixes as well though, so will do that later. > > Have you considered modeling the OCC in QEMU ? I am asking because > I have a series removing all 405 support in QEMU 10.0.
Yes we are looking at modelling some of the microcontrollers by emulating them not just simple state machines. I think starting with SBE, but OCC is on the wishlist. Perhaps hold off the removal for now? Thanks, Nick
