This patch series introduces a new CPU model, Zhaoxin YongFeng, which is
Zhaoxin's latest server processor. Additionally, it consolidates vendor naming
within QEMU: since both " Shanghai " and "Centaurhauls" now belong to
Zhaoxin, the logic has been updated to treat "Centaurhauls" as part of the
Zhaoxin vendor framework. Finally, the series addresses a CPUID compatibility
issue, ensuring correct detection of the CMPLegacy feature.
### Summary of changes
EwanHai (4):
target/i386: Add support for Zhaoxin CPU vendor identification
target/i386: Add CPUID leaf 0xC000_0001 EDX definitions
target/i386: Introduce Zhaoxin Yongfeng CPU model
target/i386: Mask CMPLegacy bit in CPUID[0x80000001].ECX for Zhaoxin
CPUs
target/i386/cpu.c | 131 ++++++++++++++++++++++++++++++++++++++++++++--
target/i386/cpu.h | 41 ++++++++++++++-
2 files changed, 167 insertions(+), 5 deletions(-)
### Version History
v5 -> v4:
Removed the Known Issues section in the cover letter.The discrepancy between
the Zhaoxin VMX Preemption Timer Rate and the value set by KVM was due to a
misunderstanding of the nested L2 preemption timer simulation logic on my part.
In fact, since the preemption timer in nested L2 is entirely simulated in
software, the L1 Preemption Timer Rate does not need to match the hardware
value.
v4 link: https://lore.kernel.org/all/20241122062135.479200-1-ewanhai-
o...@zhaoxin.com/
v4 -> v3:
1. Added "For the kernel before v6.9 ..." for more accurately describe the
patch's impact on Linux Guests.
v3 link: https://lore.kernel.org/all/20240809094259.119221-1-ewanhai-
o...@zhaoxin.com/
v3 -> v2:
1. Added a more detailed description of the CPUID[0x80000001].ECX.CMPLegacy
bit masking.
v2 link:
https://lore.kernel.org/all/20240704112511.184257-1-ewanhai...@zhaoxin.com/
v2 -> v1:
1. Removed VIA-related information from the patch description to avoid
misunderstanding.
2. Replaced CPUID_VENDOR_VIA with CPUID_VENDOR_ZHAOXIN1 because the
"Centaurhauls" vendor ID now belongs to Zhaoxin.The previous CPUID_VENDOR_VIA
macro was only defined but never used in QEMU, making this change
straightforward.
v1 link:
https://lore.kernel.org/qemu-devel/20240625091905.1325205-1-ewanhai-
o...@zhaoxin.com/
Signed-off-by: EwanHai <ewanhai...@zhaoxin.com>
Reviewed-by: Zhao Liu <zhao1....@intel.com>
--
2.34.1
