Return C_NotImplemented instead of asserting for opcodes
not implemented by the backend. For now, the assertion
moves to process_op_defs.
Reviewed-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
---
tcg/tcg.c | 10 ++++++----
tcg/aarch64/tcg-target.c.inc | 2 +-
tcg/arm/tcg-target.c.inc | 2 +-
tcg/i386/tcg-target.c.inc | 2 +-
tcg/loongarch64/tcg-target.c.inc | 2 +-
tcg/mips/tcg-target.c.inc | 2 +-
tcg/ppc/tcg-target.c.inc | 2 +-
tcg/riscv/tcg-target.c.inc | 2 +-
tcg/s390x/tcg-target.c.inc | 2 +-
tcg/sparc64/tcg-target.c.inc | 2 +-
tcg/tci/tcg-target.c.inc | 2 +-
11 files changed, 16 insertions(+), 14 deletions(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 3576299a1c..05bb464940 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -862,6 +862,7 @@ static int tcg_out_pool_finalize(TCGContext *s)
#define C_N1_O1_I4(O1, O2, I1, I2, I3, I4) C_PFX6(c_n1_o1_i4_, O1, O2, I1, I2,
I3, I4),
typedef enum {
+ C_NotImplemented = -1,
#include "tcg-target-con-set.h"
} TCGConstraintSetIndex;
@@ -3176,6 +3177,7 @@ static void process_op_defs(TCGContext *s)
const TCGTargetOpDef *tdefs;
bool saw_alias_pair = false;
int i, o, i2, o2, nb_args;
+ TCGConstraintSetIndex con_set;
if (def->flags & TCG_OPF_NOT_PRESENT) {
continue;
@@ -3188,11 +3190,11 @@ static void process_op_defs(TCGContext *s)
/*
* Macro magic should make it impossible, but double-check that
- * the array index is in range. Since the signness of an enum
- * is implementation defined, force the result to unsigned.
+ * the array index is in range. At the same time, double-check
+ * that the opcode is implemented, i.e. not C_NotImplemented.
*/
- unsigned con_set = tcg_target_op_def(op);
- tcg_debug_assert(con_set < ARRAY_SIZE(constraint_sets));
+ con_set = tcg_target_op_def(op);
+ tcg_debug_assert(con_set >= 0 && con_set <
ARRAY_SIZE(constraint_sets));
tdefs = &constraint_sets[con_set];
for (i = 0; i < nb_args; i++) {
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index d77d305f30..d1e08def60 100644
--- a/tcg/aarch64/tcg-target.c.inc
+++ b/tcg/aarch64/tcg-target.c.inc
@@ -3158,7 +3158,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode
op)
return C_O1_I2(w, 0, w);
default:
- g_assert_not_reached();
+ return C_NotImplemented;
}
}
diff --git a/tcg/arm/tcg-target.c.inc b/tcg/arm/tcg-target.c.inc
index 90ac80077f..b4cd36a9b8 100644
--- a/tcg/arm/tcg-target.c.inc
+++ b/tcg/arm/tcg-target.c.inc
@@ -2260,7 +2260,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode
op)
case INDEX_op_bitsel_vec:
return C_O1_I3(w, w, w, w);
default:
- g_assert_not_reached();
+ return C_NotImplemented;
}
}
diff --git a/tcg/i386/tcg-target.c.inc b/tcg/i386/tcg-target.c.inc
index 167228a781..813c12ca0e 100644
--- a/tcg/i386/tcg-target.c.inc
+++ b/tcg/i386/tcg-target.c.inc
@@ -3885,7 +3885,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode
op)
return C_O1_I4(x, x, x, xO, x);
default:
- g_assert_not_reached();
+ return C_NotImplemented;
}
}
diff --git a/tcg/loongarch64/tcg-target.c.inc b/tcg/loongarch64/tcg-target.c.inc
index a273e7fce5..686b94ccda 100644
--- a/tcg/loongarch64/tcg-target.c.inc
+++ b/tcg/loongarch64/tcg-target.c.inc
@@ -2391,7 +2391,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode
op)
return C_O1_I3(w, w, w, w);
default:
- g_assert_not_reached();
+ return C_NotImplemented;
}
}
diff --git a/tcg/mips/tcg-target.c.inc b/tcg/mips/tcg-target.c.inc
index 8857398893..199bd97c0e 100644
--- a/tcg/mips/tcg-target.c.inc
+++ b/tcg/mips/tcg-target.c.inc
@@ -2292,7 +2292,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode
op)
: C_O0_I4(rZ, rZ, r, r));
default:
- g_assert_not_reached();
+ return C_NotImplemented;
}
}
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-target.c.inc
index 94997b126f..3ce4fa1db6 100644
--- a/tcg/ppc/tcg-target.c.inc
+++ b/tcg/ppc/tcg-target.c.inc
@@ -4354,7 +4354,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode
op)
return C_O1_I4(v, v, v, vZM, v);
default:
- g_assert_not_reached();
+ return C_NotImplemented;
}
}
diff --git a/tcg/riscv/tcg-target.c.inc b/tcg/riscv/tcg-target.c.inc
index 7d1bba100a..51cd7e7586 100644
--- a/tcg/riscv/tcg-target.c.inc
+++ b/tcg/riscv/tcg-target.c.inc
@@ -2767,7 +2767,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode
op)
case INDEX_op_cmpsel_vec:
return C_O1_I4(v, v, vL, vK, vK);
default:
- g_assert_not_reached();
+ return C_NotImplemented;
}
}
diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc
index fdf57c0b07..98925b1d5d 100644
--- a/tcg/s390x/tcg-target.c.inc
+++ b/tcg/s390x/tcg-target.c.inc
@@ -3427,7 +3427,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode
op)
: C_O1_I4(v, v, v, vZ, v));
default:
- g_assert_not_reached();
+ return C_NotImplemented;
}
}
diff --git a/tcg/sparc64/tcg-target.c.inc b/tcg/sparc64/tcg-target.c.inc
index fe3e727399..1201607722 100644
--- a/tcg/sparc64/tcg-target.c.inc
+++ b/tcg/sparc64/tcg-target.c.inc
@@ -1627,7 +1627,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode
op)
return C_O1_I2(r, r, r);
default:
- g_assert_not_reached();
+ return C_NotImplemented;
}
}
diff --git a/tcg/tci/tcg-target.c.inc b/tcg/tci/tcg-target.c.inc
index 5f88ca0537..74b649c902 100644
--- a/tcg/tci/tcg-target.c.inc
+++ b/tcg/tci/tcg-target.c.inc
@@ -186,7 +186,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
return TCG_TARGET_REG_BITS == 64 ? C_O0_I2(r, r) : C_O0_I4(r, r, r, r);
default:
- g_assert_not_reached();
+ return C_NotImplemented;
}
}
--
2.43.0
