Hi Jonathan,
I'm trying to emulate our memory appliance which is similar to a MH-SLD. The
memory device is connected to the host server while the size of the memory
could be changed by the out-of-band fabric manager. If there is no memory
assigned to the host, the CXL device will be booted as zero memory size.
Recently we got some interest on trying our fabric manager software without
having the real hardware. Supporting zero memory size in QEMU will be needed in
this scenario.
Some detail about our memory appliance could be found from our OCP
presentation:
https://drive.google.com/file/d/1i8kBsBfRGjNqnTQqJ9upC-Xm9o56Y2Y5/view?usp=drive_link
Thanks,
Hongjian Fan
Seagate Internal
________________________________________
From: Jonathan Cameron <jonathan.came...@huawei.com>
Sent: Tuesday, December 3, 2024 11:23 AM
To: Hongjian Fan <hongjian....@seagate.com>
Cc: qemu-devel@nongnu.org <qemu-devel@nongnu.org>; linux-...@vger.kernel.org
<linux-...@vger.kernel.org>; fan...@samsung.com <fan...@samsung.com>
Subject: Re: [PATCH] hw/mem: support zero memory size CXL device
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On Mon, 2 Dec 2024 17:03:11 -0600
Hongjian Fan <hongjian....@seagate.com> wrote:
> According to CXL 3.1 specification, 8.1.3.8 DVSEC CXL Range Registers "A
> CXL.mem-capable device is permitted to report zero memory size."
> This patch will allow a CXL type3 device to be initialized with zero memory
> size, when there is no memory device property provided ( neither volatile,
> persistent, nor dynamic region).
Wrap at less than 75 chars.
I'm curious. Why do you want to emulate such a device?
There are many things the CXL spec allows that we don't emulate.
I'd normally count this as just another one of those.
Jonathan
>
> Signed-off-by: Hongjian Fan <hongjian....@seagate.com>
> ---
> hw/mem/cxl_type3.c | 14 +++++++++++---
> 1 file changed, 11 insertions(+), 3 deletions(-)
>
> diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
> index 5cf754b38f..35caa186ca 100644
> --- a/hw/mem/cxl_type3.c
> +++ b/hw/mem/cxl_type3.c
> @@ -159,7 +159,12 @@ static int ct3_build_cdat_table(CDATSubHeader
> ***cdat_table, void *priv)
> int len = 0;
>
> if (!ct3d->hostpmem && !ct3d->hostvmem && !ct3d->dc.num_regions) {
> - return 0;
> + // zero memory size device. Build one entry with size 0
Comment syntax /* */
> + table = g_malloc0(CT3_CDAT_NUM_ENTRIES * sizeof(*table));
> + ct3_build_cdat_entries_for_mr(&(table[0]), dsmad_handle++,
> + 0, false, false, 0);
> + *cdat_table = g_steal_pointer(&table);
> + return CT3_CDAT_NUM_ENTRIES;
> }
>
> if (ct3d->hostvmem) {
> @@ -712,8 +717,11 @@ static bool cxl_setup_memory(CXLType3Dev *ct3d, Error
> **errp)
>
> if (!ct3d->hostmem && !ct3d->hostvmem && !ct3d->hostpmem
> && !ct3d->dc.num_regions) {
> - error_setg(errp, "at least one memdev property must be set");
> - return false;
> + // no memdev property provided. Default to zero memory size device
> + ct3d->cxl_dstate.pmem_size = 0;
> + ct3d->cxl_dstate.vmem_size = 0;
> + ct3d->cxl_dstate.static_mem_size = 0;
> + return true;
> } else if (ct3d->hostmem && ct3d->hostpmem) {
> error_setg(errp, "[memdev] cannot be used with new "
> "[persistent-memdev] property");
