Re: [PATCH v3 10/16] target/mips: Introduce decode tree bindings for nanoMIPS ISA

[Richard Henderson]

On 11/26/24 07:59, Philippe Mathieu-Daudé wrote:

@@ -4480,6 +4480,22 @@ static int decode_isa_nanomips(CPUMIPSState *env, 
DisasContext *ctx)

opcode = translator_lduw(env, &ctx->base, ctx->base.pc_next);

      ctx->opcode = opcode;
+    if (decode_isa_nanomips16(ctx, opcode)) {
+        return 2;
+    }
+
+    opcode <<= 16;
+    opcode |= translator_lduw(env, &ctx->base, ctx->base.pc_next + 2);
+    if (decode_isa_nanomips32(ctx, opcode)) {
+        return 4;
+    }
+
+    opcode <<= 16;
+    opcode |= translator_lduw(env, &ctx->base, ctx->base.pc_next + 4);
+    if (decode_isa_nanomips48(ctx, opcode)) {
+        return 6;
+    }

Oof.  Trivial to determine 32 vs 48 bit (NM_P48I), but much harder for 16 vs 32 
bit.

Maybe this *would* be easier with decodetree --varinsnwidth.


r~