From: Philippe Mathieu-Daudé <f4...@amsat.org>
Introduce the microMIPS decodetree configs for the 16-bit
and 32-bit instructions.
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
---
target/mips/tcg/translate.h | 2 ++
target/mips/tcg/micromips16.decode | 9 +++++++++
target/mips/tcg/micromips32.decode | 9 +++++++++
target/mips/tcg/micromips_translate.c | 14 ++++++++++++++
target/mips/tcg/micromips_translate.c.inc | 6 ++++++
target/mips/tcg/meson.build | 3 +++
6 files changed, 43 insertions(+)
create mode 100644 target/mips/tcg/micromips16.decode
create mode 100644 target/mips/tcg/micromips32.decode
create mode 100644 target/mips/tcg/micromips_translate.c
diff --git a/target/mips/tcg/translate.h b/target/mips/tcg/translate.h
index a65ab4a747..816453f2be 100644
--- a/target/mips/tcg/translate.h
+++ b/target/mips/tcg/translate.h
@@ -222,6 +222,8 @@ bool decode_ase_mxu(DisasContext *ctx, uint32_t insn);
bool decode_64bit_enabled(DisasContext *ctx);
/* decodetree generated */
+bool decode_isa_micromips16(DisasContext *ctx, uint16_t insn);
+bool decode_isa_micromips32(DisasContext *ctx, uint32_t insn);
bool decode_isa_rel6(DisasContext *ctx, uint32_t insn);
bool decode_ase_msa(DisasContext *ctx, uint32_t insn);
bool decode_ext_txx9(DisasContext *ctx, uint32_t insn);
diff --git a/target/mips/tcg/micromips16.decode
b/target/mips/tcg/micromips16.decode
new file mode 100644
index 0000000000..207e9c69f9
--- /dev/null
+++ b/target/mips/tcg/micromips16.decode
@@ -0,0 +1,9 @@
+# microMIPS32 16-bit instruction set extensions
+#
+# Copyright (C) 2021 Philippe Mathieu-Daudé
+#
+# SPDX-License-Identifier: LGPL-2.1-or-later
+#
+# Reference: MIPS Architecture for Programmers, Volume II-B
+# microMIPS32 Instruction Set
+# (Document Number: MD00582)
diff --git a/target/mips/tcg/micromips32.decode
b/target/mips/tcg/micromips32.decode
new file mode 100644
index 0000000000..c115ed2eab
--- /dev/null
+++ b/target/mips/tcg/micromips32.decode
@@ -0,0 +1,9 @@
+# microMIPS32 32-bit instruction set extensions
+#
+# Copyright (C) 2021 Philippe Mathieu-Daudé
+#
+# SPDX-License-Identifier: LGPL-2.1-or-later
+#
+# Reference: MIPS Architecture for Programmers, Volume II-B
+# microMIPS32 Instruction Set
+# (Document Number: MD00582)
diff --git a/target/mips/tcg/micromips_translate.c
b/target/mips/tcg/micromips_translate.c
new file mode 100644
index 0000000000..49e90e7eca
--- /dev/null
+++ b/target/mips/tcg/micromips_translate.c
@@ -0,0 +1,14 @@
+/*
+ * MIPS emulation for QEMU - microMIPS translation routines
+ *
+ * Copyright (c) 2021 Philippe Mathieu-Daudé <f4...@amsat.org>
+ *
+ * SPDX-License-Identifier: LGPL-2.1-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "translate.h"
+
+/* Include the auto-generated decoders. */
+#include "decode-micromips16.c.inc"
+#include "decode-micromips32.c.inc"
diff --git a/target/mips/tcg/micromips_translate.c.inc
b/target/mips/tcg/micromips_translate.c.inc
index c479bec108..f504e15fa7 100644
--- a/target/mips/tcg/micromips_translate.c.inc
+++ b/target/mips/tcg/micromips_translate.c.inc
@@ -3000,6 +3000,9 @@ static int decode_isa_micromips(CPUMIPSState *env,
DisasContext *ctx)
gen_reserved_instruction(ctx);
return 2;
}
+ if (decode_isa_micromips32(ctx, ctx->opcode)) {
+ return 4;
+ }
break;
case 1:
/* POOL16A, POOL16B, POOL16C, LWGP16, POOL16F */
@@ -3011,6 +3014,9 @@ static int decode_isa_micromips(CPUMIPSState *env,
DisasContext *ctx)
gen_reserved_instruction(ctx);
return 2;
}
+ if (decode_isa_micromips16(ctx, ctx->opcode)) {
+ return 2;
+ }
break;
}
}
diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build
index 7b18e6c4c8..5db5681eb1 100644
--- a/target/mips/tcg/meson.build
+++ b/target/mips/tcg/meson.build
@@ -1,4 +1,6 @@
gen = [
+ decodetree.process('micromips16.decode', extra_args:
['--decode=decode_isa_micromips16', '--insnwidth=16']),
+ decodetree.process('micromips32.decode', extra_args:
['--decode=decode_isa_micromips32']),
decodetree.process('rel6.decode', extra_args: ['--decode=decode_isa_rel6']),
decodetree.process('msa.decode', extra_args: '--decode=decode_ase_msa'),
decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'),
@@ -16,6 +18,7 @@ mips_ss.add(files(
'fpu_helper.c',
'ldst_helper.c',
'lmmi_helper.c',
+ 'micromips_translate.c',
'msa_helper.c',
'msa_translate.c',
'op_helper.c',
--
2.45.2
