Hi,
lgtm
Thanks
cmd
On 04/11/2024 13:55, Zhenzhong Duan wrote:
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>
> IEC descriptor is 128-bit invalidation descriptor, must be padded with
> 128-bits of 0s in the upper bytes to create a 256-bit descriptor when
> the invalidation queue is configured for 256-bit descriptors (IQA_REG.DW=1).
>
> Fixes: 02a2cbc872df ("x86-iommu: introduce IEC notifiers")
> Signed-off-by: Zhenzhong Duan <zhenzhong.d...@intel.com>
> ---
> hw/i386/intel_iommu_internal.h | 3 +++
> hw/i386/intel_iommu.c | 8 ++++++++
> 2 files changed, 11 insertions(+)
>
> diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
> index 75ccd501b0..4323fc5d6d 100644
> --- a/hw/i386/intel_iommu_internal.h
> +++ b/hw/i386/intel_iommu_internal.h
> @@ -410,6 +410,9 @@ typedef union VTDInvDesc VTDInvDesc;
> #define VTD_INV_DESC_DEVICE_IOTLB_RSVD_HI 0xffeULL
> #define VTD_INV_DESC_DEVICE_IOTLB_RSVD_LO 0xffff0000ffe0f1f0
>
> +/* Masks for Interrupt Entry Invalidate Descriptor */
> +#define VTD_INV_DESC_IEC_RSVD 0xffff000007fff1e0ULL
> +
> /* Rsvd field masks for spte */
> #define VTD_SPTE_SNP 0x800ULL
>
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 2fc3866433..4c0d1d7d47 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -2692,6 +2692,14 @@ static bool vtd_process_iotlb_desc(IntelIOMMUState *s,
> VTDInvDesc *inv_desc)
> static bool vtd_process_inv_iec_desc(IntelIOMMUState *s,
> VTDInvDesc *inv_desc)
> {
> + uint64_t mask[4] = {VTD_INV_DESC_IEC_RSVD, VTD_INV_DESC_ALL_ONE,
> + VTD_INV_DESC_ALL_ONE, VTD_INV_DESC_ALL_ONE};
> +
> + if (!vtd_inv_desc_reserved_check(s, inv_desc, mask, false,
> + __func__, "iec inv")) {
> + return false;
> + }
> +
> trace_vtd_inv_desc_iec(inv_desc->iec.granularity,
> inv_desc->iec.index,
> inv_desc->iec.index_mask);
> --
> 2.34.1
>
