On Fri, Oct 25, 2024 at 03:18:25PM +0200, Eric Auger wrote: > Hi Daniel, > > On 10/25/24 15:06, Daniel P. Berrangé wrote: > > On Fri, Oct 25, 2024 at 12:17:37PM +0200, Eric Auger wrote: > >> This new cpu model takes by default the host cpu values. > >> However it exposes uint64 SYSREG properties for writable ID reg > >> fields exposed by the host kernel. Properties are named > >> SYSREG_<REG>_<FIELD> with REG and FIELD being those used > >> in linux arch/arm64/tools/sysreg. This done by matching the > >> writable fields retrieved from the host kernel against the > >> generated description of sysregs. > >> > >> An example of invocation is: > >> -cpu custom,SYSREG_ID_AA64ISAR0_EL1_DP=0x0 > >> which sets DP field of ID_AA64ISAR0_EL1 to 0. > > "SYSREG_" feels kinda redundant to repeat on every single > > feature. > > I do agree. To be honest this was mostly driven my implementation need > for cpu model expansion. Given the high number of props which are > getting exposed, I iterate on all props and having a prefix let me > return only those SYSREG props. Most probably we can get rid of the > prefix by using some generated code as well. > > > > Also, is this naming convention really the same one that users > > will see when they look at /proc/cpuinfo to view features ? It > No it is not. I do agree that the custom cpu model is very low level. It > is very well suited to test all series turning ID regs as writable but > this would require an extra layer that adapts /proc/cpuinfo feature > level to this regid/field abstraction. > > In /cpu/proc you will see somethink like: > Features : fp asimd evtstrm aes pmull sha1 sha2 crc32 atomics fphp > asimdhp cpuid asimdrdm lrcpc dcpop asimddp
Right, IMHO, this is the terminology that QEMU must use in user facing APIs. On x86 we have a conversion tables for named features to register bits https://gitlab.com/qemu-project/qemu/-/blob/master/target/i386/cpu.c#L914 and libvirt does similar https://gitlab.com/libvirt/libvirt/-/blob/master/src/cpu_map/x86_features.xml Yep, it is more work, but it is also much better for humans IMHO. > > feels pretty low level to me ? Naming after the registers & > > fields, would be like configuring x86 CPU features by asking > > for "SYSREG_EAX_1_ECX_20" instead of saying "vmx" which is the > > human friendly name. > agreed. > >> At the moment, the custom model does not support legacy options > >> of the host cpu model. We need to understand what we do with those > >> latter (SVE, ...). This means that related KVM ioctl are > >> not called yet. > > It will be pretty painful to have to use different feature > > terminology for different CPU models. Everything in libvirt > > assuming feature terminology varies per-arch, not per-CPU > > model. > Actually as far as I understand those regids/fields would fit all kind > of aarch64 Cortex-A CPUs. So they wouldn't vary per-CPU (I mean their > terminology. Their availability will). What I mean is can we define named models for various different vendor's Cortex-A silicon and just use that without needing to toggle features, except in rare cases. With regards, Daniel -- |: https://berrange.com -o- https://www.flickr.com/photos/dberrange :| |: https://libvirt.org -o- https://fstop138.berrange.com :| |: https://entangle-photo.org -o- https://www.instagram.com/dberrange :|
