This is in preparation for moving NeXTRTC to its own separate device.
Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
---
hw/m68k/next-cube.c | 169 ++++++++++++++++++++++++--------------------
1 file changed, 92 insertions(+), 77 deletions(-)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index 2a2e970830..43b2c775c0 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -171,6 +171,90 @@ static bool next_rtc_cmd_is_write(uint8_t cmd)
(cmd == 0xb1);
}
+static void next_rtc_data_in_irq(void *opaque, int n, int level)
+{
+ NeXTPC *s = NEXT_PC(opaque);
+ NeXTRTC *rtc = &s->rtc;
+
+ if (rtc->phase < 8) {
+ rtc->command = (rtc->command << 1) | level;
+
+ if (rtc->phase == 7 && !next_rtc_cmd_is_write(rtc->command)) {
+ if (rtc->command <= 0x1f) {
+ /* RAM registers */
+ rtc->retval = rtc->ram[rtc->command];
+ }
+ if ((rtc->command >= 0x20) && (rtc->command <= 0x2f)) {
+ /* RTC */
+ time_t time_h = time(NULL);
+ struct tm *info = localtime(&time_h);
+ rtc->retval = 0;
+
+ switch (rtc->command) {
+ case 0x20:
+ rtc->retval = SCR2_TOBCD(info->tm_sec);
+ break;
+ case 0x21:
+ rtc->retval = SCR2_TOBCD(info->tm_min);
+ break;
+ case 0x22:
+ rtc->retval = SCR2_TOBCD(info->tm_hour);
+ break;
+ case 0x24:
+ rtc->retval = SCR2_TOBCD(info->tm_mday);
+ break;
+ case 0x25:
+ rtc->retval = SCR2_TOBCD((info->tm_mon + 1));
+ break;
+ case 0x26:
+ rtc->retval = SCR2_TOBCD((info->tm_year - 100));
+ break;
+ }
+ }
+ if (rtc->command == 0x30) {
+ /* read the status 0x30 */
+ rtc->retval = rtc->status;
+ }
+ if (rtc->command == 0x31) {
+ /* read the control 0x31 */
+ rtc->retval = rtc->control;
+ }
+ }
+ }
+ if (rtc->phase >= 8 && rtc->phase < 16) {
+ if (next_rtc_cmd_is_write(rtc->command)) {
+ /* Shift in value to write */
+ rtc->value = (rtc->value << 1) | level;
+ } else {
+ /* Shift out value to read */
+ qemu_irq rtc_data_in_irq = qdev_get_gpio_in_named(
+ DEVICE(s), "pc-rtc-data-in", 0);
+
+ if (rtc->retval & (0x80 >> (rtc->phase - 8))) {
+ qemu_irq_raise(rtc_data_in_irq);
+ } else {
+ qemu_irq_lower(rtc_data_in_irq);
+ }
+ }
+ }
+
+ rtc->phase++;
+ if (rtc->phase == 16 && next_rtc_cmd_is_write(rtc->command)) {
+ if (rtc->command >= 0x80 && rtc->command <= 0x9f) {
+ /* RAM registers */
+ rtc->ram[rtc->command - 0x80] = rtc->value;
+ }
+ if (rtc->command == 0xb1) {
+ /* write to 0x30 register */
+ if (rtc->value & 0x04) {
+ /* clear FTU */
+ rtc->status = rtc->status & (~0x18);
+ qemu_irq_lower(s->rtc_power_irq);
+ }
+ }
+ }
+}
+
static void next_scr2_rtc_update(NeXTPC *s)
{
uint8_t old_scr2, scr2_2;
@@ -187,84 +271,13 @@ static void next_scr2_rtc_update(NeXTPC *s)
/* If we are in going down clock... do something */
if (((old_scr2 & SCR2_RTCLK) != (scr2_2 & SCR2_RTCLK)) &&
((scr2_2 & SCR2_RTCLK) == 0)) {
- if (rtc->phase < 8) {
- rtc->command = (rtc->command << 1) |
- ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
-
- if (rtc->phase == 7 && !next_rtc_cmd_is_write(rtc->command)) {
- if (rtc->command <= 0x1f) {
- /* RAM registers */
- rtc->retval = rtc->ram[rtc->command];
- }
- if ((rtc->command >= 0x20) && (rtc->command <= 0x2F)) {
- /* RTC */
- time_t time_h = time(NULL);
- struct tm *info = localtime(&time_h);
- rtc->retval = 0;
-
- switch (rtc->command) {
- case 0x20:
- rtc->retval = SCR2_TOBCD(info->tm_sec);
- break;
- case 0x21:
- rtc->retval = SCR2_TOBCD(info->tm_min);
- break;
- case 0x22:
- rtc->retval = SCR2_TOBCD(info->tm_hour);
- break;
- case 0x24:
- rtc->retval = SCR2_TOBCD(info->tm_mday);
- break;
- case 0x25:
- rtc->retval = SCR2_TOBCD((info->tm_mon + 1));
- break;
- case 0x26:
- rtc->retval = SCR2_TOBCD((info->tm_year - 100));
- break;
- }
- }
- if (rtc->command == 0x30) {
- /* read the status 0x30 */
- rtc->retval = rtc->status;
- }
- if (rtc->command == 0x31) {
- /* read the control 0x31 */
- rtc->retval = rtc->control;
- }
- }
- }
- if (rtc->phase >= 8 && rtc->phase < 16) {
- if (next_rtc_cmd_is_write(rtc->command)) {
- /* Shift in value to write */
- rtc->value = (rtc->value << 1) |
- ((scr2_2 & SCR2_RTDATA) ? 1 : 0);
- } else {
- /* Shift out value to read */
- qemu_irq rtc_data_in_irq = qdev_get_gpio_in_named(
- DEVICE(s), "pc-rtc-data-in", 0);
-
- if (rtc->retval & (0x80 >> (rtc->phase - 8))) {
- qemu_irq_raise(rtc_data_in_irq);
- } else {
- qemu_irq_lower(rtc_data_in_irq);
- }
- }
- }
+ qemu_irq rtc_data_in_irq = qdev_get_gpio_in_named(
+ DEVICE(s), "rtc-data-in", 0);
- rtc->phase++;
- if (rtc->phase == 16 && next_rtc_cmd_is_write(rtc->command)) {
- if (rtc->command >= 0x80 && rtc->command <= 0x9f) {
- /* RAM registers */
- rtc->ram[rtc->command - 0x80] = rtc->value;
- }
- if (rtc->command == 0xb1) {
- /* write to 0x30 register */
- if (rtc->value & 0x04) {
- /* clear FTU */
- rtc->status = rtc->status & (~0x18);
- qemu_irq_lower(s->rtc_power_irq);
- }
- }
+ if (scr2_2 & SCR2_RTDATA) {
+ qemu_irq_raise(rtc_data_in_irq);
+ } else {
+ qemu_irq_lower(rtc_data_in_irq);
}
}
} else {
@@ -1104,6 +1117,8 @@ static void next_pc_init(Object *obj)
s->rtc_power_irq = qdev_get_gpio_in(DEVICE(obj), NEXT_PWR_I);
qdev_init_gpio_in_named(DEVICE(obj), next_pc_rtc_data_in_irq,
"pc-rtc-data-in", 1);
+ qdev_init_gpio_in_named(DEVICE(obj), next_rtc_data_in_irq,
+ "rtc-data-in", 1);
}
/*
--
2.39.5
