On Thu, Oct 17, 2024 at 5:35 AM Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> From: TANG Tiancheng <tangtiancheng....@alibaba-inc.com>
>
> Add support for probing RISC-V vector extension availability in
> the backend. This information will be used when deciding whether
> to use vector instructions in code generation.
>
> Cache lg2(vlenb) for the backend. The storing of lg2(vlenb) means
> we can convert all of the division into subtraction.
>
> While the compiler doesn't support RISCV_HWPROBE_EXT_ZVE64X,
> we use RISCV_HWPROBE_IMA_V instead. RISCV_HWPROBE_IMA_V is more
> strictly constrainted than RISCV_HWPROBE_EXT_ZVE64X. At least in
> current QEMU implemenation, the V vector extension depends on the
> zve64d extension.
>
> Signed-off-by: TANG Tiancheng <tangtiancheng....@alibaba-inc.com>
> Reviewed-by: Liu Zhiwei <zhiwei_...@linux.alibaba.com>
> Message-ID: <20241007025700.47259-2-zhiwei_...@linux.alibaba.com>
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Acked-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> host/include/riscv/host/cpuinfo.h | 2 ++
> util/cpuinfo-riscv.c | 24 ++++++++++++++++++++++--
> 2 files changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/host/include/riscv/host/cpuinfo.h
> b/host/include/riscv/host/cpuinfo.h
> index 2b00660e36..cdc784e7b6 100644
> --- a/host/include/riscv/host/cpuinfo.h
> +++ b/host/include/riscv/host/cpuinfo.h
> @@ -10,9 +10,11 @@
> #define CPUINFO_ZBA (1u << 1)
> #define CPUINFO_ZBB (1u << 2)
> #define CPUINFO_ZICOND (1u << 3)
> +#define CPUINFO_ZVE64X (1u << 4)
>
> /* Initialized with a constructor. */
> extern unsigned cpuinfo;
> +extern unsigned riscv_lg2_vlenb;
>
> /*
> * We cannot rely on constructor ordering, so other constructors must
> diff --git a/util/cpuinfo-riscv.c b/util/cpuinfo-riscv.c
> index 8cacc67645..16114ffd32 100644
> --- a/util/cpuinfo-riscv.c
> +++ b/util/cpuinfo-riscv.c
> @@ -4,6 +4,7 @@
> */
>
> #include "qemu/osdep.h"
> +#include "qemu/host-utils.h"
> #include "host/cpuinfo.h"
>
> #ifdef CONFIG_ASM_HWPROBE_H
> @@ -13,6 +14,7 @@
> #endif
>
> unsigned cpuinfo;
> +unsigned riscv_lg2_vlenb;
> static volatile sig_atomic_t got_sigill;
>
> static void sigill_handler(int signo, siginfo_t *si, void *data)
> @@ -34,7 +36,7 @@ static void sigill_handler(int signo, siginfo_t *si, void
> *data)
> /* Called both as constructor and (possibly) via other constructors. */
> unsigned __attribute__((constructor)) cpuinfo_init(void)
> {
> - unsigned left = CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZICOND;
> + unsigned left = CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZICOND |
> CPUINFO_ZVE64X;
> unsigned info = cpuinfo;
>
> if (info) {
> @@ -50,6 +52,9 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
> #endif
> #if defined(__riscv_arch_test) && defined(__riscv_zicond)
> info |= CPUINFO_ZICOND;
> +#endif
> +#if defined(__riscv_arch_test) && defined(__riscv_zve64x)
> + info |= CPUINFO_ZVE64X;
> #endif
> left &= ~info;
>
> @@ -65,7 +70,8 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
> && pair.key >= 0) {
> info |= pair.value & RISCV_HWPROBE_EXT_ZBA ? CPUINFO_ZBA : 0;
> info |= pair.value & RISCV_HWPROBE_EXT_ZBB ? CPUINFO_ZBB : 0;
> - left &= ~(CPUINFO_ZBA | CPUINFO_ZBB);
> + info |= pair.value & RISCV_HWPROBE_IMA_V ? CPUINFO_ZVE64X : 0;
> + left &= ~(CPUINFO_ZBA | CPUINFO_ZBB | CPUINFO_ZVE64X);
> #ifdef RISCV_HWPROBE_EXT_ZICOND
> info |= pair.value & RISCV_HWPROBE_EXT_ZICOND ? CPUINFO_ZICOND :
> 0;
> left &= ~CPUINFO_ZICOND;
> @@ -113,6 +119,20 @@ unsigned __attribute__((constructor)) cpuinfo_init(void)
> assert(left == 0);
> }
>
> + if (info & CPUINFO_ZVE64X) {
> + /*
> + * We are guaranteed by RVV-1.0 that VLEN is a power of 2.
> + * We are guaranteed by Zve64x that VLEN >= 64, and that
> + * EEW of {8,16,32,64} are supported.
> + *
> + * Cache VLEN in a convenient form.
> + */
> + unsigned long vlenb;
> + /* Read csr "vlenb" with "csrr %0, vlenb" : "=r"(vlenb) */
> + asm volatile(".insn i 0x73, 0x2, %0, zero, -990" : "=r"(vlenb));
> + riscv_lg2_vlenb = ctz32(vlenb);
> + }
> +
> info |= CPUINFO_ALWAYS;
> cpuinfo = info;
> return info;
> --
> 2.43.0
>
>
