On Thu, Oct 17, 2024 at 5:35 AM Richard Henderson
<richard.hender...@linaro.org> wrote:
>
> The first immediate field is unsigned, whereas operand_vimm
> extracts a signed value. There is no need to mask the result
> with 'u'; just print the immediate with 'i'.
>
> Fixes: 07f4964d178 ("disas/riscv.c: rvv: Add disas support for vector
> instructions")
> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> disas/riscv.h | 2 +-
> disas/riscv.c | 2 +-
> 2 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/disas/riscv.h b/disas/riscv.h
> index 16a08e4895..0d1f89ce8a 100644
> --- a/disas/riscv.h
> +++ b/disas/riscv.h
> @@ -290,7 +290,7 @@ enum {
> #define rv_fmt_fd_vs2 "O\t3,F"
> #define rv_fmt_vd_vm "O\tDm"
> #define rv_fmt_vsetvli "O\t0,1,v"
> -#define rv_fmt_vsetivli "O\t0,u,v"
> +#define rv_fmt_vsetivli "O\t0,i,v"
> #define rv_fmt_rs1_rs2_zce_ldst "O\t2,i(1)"
> #define rv_fmt_push_rlist "O\tx,-i"
> #define rv_fmt_pop_rlist "O\tx,i"
> diff --git a/disas/riscv.c b/disas/riscv.c
> index 5965574d87..fc0331b90b 100644
> --- a/disas/riscv.c
> +++ b/disas/riscv.c
> @@ -4808,7 +4808,7 @@ static void decode_inst_operands(rv_decode *dec, rv_isa
> isa)
> break;
> case rv_codec_vsetivli:
> dec->rd = operand_rd(inst);
> - dec->imm = operand_vimm(inst);
> + dec->imm = extract32(inst, 15, 5);
> dec->vzimm = operand_vzimm10(inst);
> break;
> case rv_codec_zcb_lb:
> --
> 2.43.0
>
>
