Loongson-3A6000 and newer processors have hardware page table walker (PTW) support. PTW can handle all fastpaths of PIL/PIS/PIF/PIE exceptions by hardware.
V2: - Remove the '21' magic value, patch1; - Add a flag is_debug for debug access, patch5; - Use qatomic_cmpxchg to change the new pte_val, patch5. Song Gao (5): target/loongarch: Add a new cpu_type la664 target/loongarch: Add do_lddir/ldpte() target/loongarch: Add do_fill_tlb_entry() target/loongarch: Add get_random_tlb_index() target/loongarch/tcg: Add hardware page table walker support target/loongarch/cpu-csr.h | 3 + target/loongarch/cpu.c | 51 ++++-- target/loongarch/cpu.h | 1 + target/loongarch/cpu_helper.c | 26 ++- target/loongarch/internals.h | 4 +- target/loongarch/tcg/tlb_helper.c | 277 ++++++++++++++++++++++++------ 6 files changed, 293 insertions(+), 69 deletions(-) -- 2.33.0
