On Sat, 14 Sept 2024 at 04:42, Jacob Abrams <satur9n...@gmail.com> wrote: > I have received a response from my contact Nicolas Fillon at STM, he wrote "I > see we are making 16 bit access read and write to these 16 bit registers in > our library for both HAL and LL so this should be a documentation issue."
Thanks for the update. > I noticed in the Qemu source the RegisterAccessInfo struct and associated > register_write_memory/register_write functions. These functions appear quite > helpful to ensure that reserved bits are not written by using the ro field. I > don't see very much usage of this paradigm in Qemu however, only Xilinx and > USB DWC3 code appears to use it, but it seems a useful approach in many > situations, especially for STM chips. > > On the physical STM hardware, specifically the STM32L476, it allows writes > smaller than 32-bit to 32-bit registers and does not fault or ignore them. In > fact I noticed some very interesting byte duplication behavior, I tested the > following code > Notice how an 8-bit write of just 0xDD is duplicates to all words in the > register, strange. I wonder if Qemu is interested in emulating this exact > behavior, it doesn't seem particularly critical since the drivers provided by > STM should never purposely write to fewer bits than are actually writable. No, I don't think we care about emulating that exact behaviour. We could if you like do a LOG_GUEST_ERROR for a write that's smaller than the number of implemented bits, since it seems highly unlikely that a guest really intended that byte duplication, but I'm not sure I would personally go to that effort. -- PMM
