[PATCH v2] hw/nvme: Adding support for NPDAL and NPDGL

[Ayush Mishra]

Adding support for new 32 bit NPDGL and NPDAL fields to address the
needs of larger granularities.

Signed-off-by: Ayush Mishra <ayush....@samsung.com>
---
 v1 -> v2: Added macros for NSFEAT in /include/block/nvme.h as suggested
by Klaus.

 hw/nvme/ns.c         |  5 ++++-
 include/block/nvme.h | 17 ++++++++++++++++-
 2 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/hw/nvme/ns.c b/hw/nvme/ns.c
index ea8db175db..7f51b6eec4 100644
--- a/hw/nvme/ns.c
+++ b/hw/nvme/ns.c
@@ -30,6 +30,7 @@
 void nvme_ns_init_format(NvmeNamespace *ns)
 {
     NvmeIdNs *id_ns = &ns->id_ns;
+    NvmeIdNsNvm *id_ns_nvm = &ns->id_ns_nvm;
     BlockDriverInfo bdi;
     int npdg, ret;
     int64_t nlbas;
@@ -55,6 +56,8 @@ void nvme_ns_init_format(NvmeNamespace *ns)
     }
 
     id_ns->npda = id_ns->npdg = npdg - 1;
+    id_ns_nvm->npdal = npdg;
+    id_ns_nvm->npdgl = npdg;
 }
 
 static int nvme_ns_init(NvmeNamespace *ns, Error **errp)
@@ -72,7 +75,7 @@ static int nvme_ns_init(NvmeNamespace *ns, Error **errp)
     ns->id_ns.dlfeat = 0x1;
 
     /* support DULBE and I/O optimization fields */
-    id_ns->nsfeat |= (0x4 | 0x10);
+    id_ns->nsfeat |= (NVME_DEALLOCATED_ERROR | NVME_OPTIONAL_WRITE_PERF);
 
     if (ns->params.shared) {
         id_ns->nmic |= NVME_NMIC_NS_SHARED;
diff --git a/include/block/nvme.h b/include/block/nvme.h
index 5298bc4a28..7a84664bf2 100644
--- a/include/block/nvme.h
+++ b/include/block/nvme.h
@@ -1413,7 +1413,12 @@ typedef struct QEMU_PACKED NvmeIdNsNvm {
     uint8_t     pic;
     uint8_t     rsvd9[3];
     uint32_t    elbaf[NVME_MAX_NLBAF];
-    uint8_t     rsvd268[3828];
+    uint32_t    npdgl;
+    uint32_t    nprg;
+    uint32_t    npra;
+    uint32_t    nors;
+    uint32_t    npdal;
+    uint8_t     rsvd288[3808];
 } NvmeIdNsNvm;
 
 typedef struct QEMU_PACKED NvmeIdNsDescr {
@@ -1536,6 +1541,16 @@ typedef union NvmeDifTuple {
     } g64;
 } NvmeDifTuple;
 
+enum {
+    NVME_THIN_PROVISIONING          = 1 << 0,
+    NVME_NS_SUPP_ATOMIC_BOUND_POW   = 1 << 1,
+    NVME_DEALLOCATED_ERROR          = 1 << 2,
+    NVME_UID_REUSE                  = 1 << 3,
+    NVME_OPTIONAL_WRITE_PERF        = 3 << 4,
+    NVME_MULTIPLE_ATOMICITY_MODE    = 1 << 6,
+    NVME_OPTIONAL_READ_PERF         = 1 << 7,
+};
+
 enum NvmeZoneAttr {
     NVME_ZA_FINISHED_BY_CTLR         = 1 << 0,
     NVME_ZA_FINISH_RECOMMENDED       = 1 << 1,
-- 
2.43.0