Hi Richard,

On 8/28/24 9:43 PM, Richard Henderson wrote:
On 8/28/24 04:01, Gustavo Romero wrote:
  SECTIONS
  {
-    /* virt machine, RAM starts at 1gb */
+    /* Skip first 1 GiB on virt machine: RAM starts at 1 GiB. */
      . = (1 << 30);

Better is to use

MEMORY {
   RAM (rwx) : ORIGIN = 1 << 30, LENGTH = 16M
}

(or whatever minimum length seems reasonable).

Since there is only one memory region, it will be used by default and no 
further markup is required.

+    /* Align text to first 2 MiB. */
+    . = ALIGN(0 * 2M);

This is pointless, of course: ALIGN(0) does nothing.

@@ -19,12 +21,12 @@ SECTIONS
          *(.bss)
      }
      /*
-     * Align the MTE page to the next 2mb boundary (i.e., the third 2mb chunk
-     * starting from 1gb) by setting the address for symbol 'mte_page', which 
is
-     * used in boot.S to setup the PTE and in the mte.S test as the address 
that
-     * the MTE instructions operate on.
+     * Align the MTE page to the next 2 MiB boundary (i.e., the third 2 MiB
+     * chunk starting from 1 GiB) by setting the address for symbol 'mte_page',
+     * which is used in boot.S to setup the PTE and in the mte.S test as the
+     * address that the MTE instructions operate on.
       */
-    mte_page = ALIGN(1 << 22);
+    mte_page = ALIGN(2 * 2M);

This does not do what you think it does.
It aligns to the next 4M boundary, not the next 2M boundary.

I see now. This works because by chance ALIGN(2M) == ALIGN(4M).

So, using the 'M' suffix, I understand this is correct (and works):

(diff against the my patch)

index 46f1092522..823d47f7e7 100644
--- a/tests/tcg/aarch64/system/kernel.ld
+++ b/tests/tcg/aarch64/system/kernel.ld
@@ -11,7 +11,7 @@ SECTIONS
         *(.rodata)
     }
     /* align r/w section to next 2mb */
-    . = ALIGN(1 << 21);
+    . = ALIGN(2M);
     .data : {
         *(.data)
     }
@@ -24,7 +24,7 @@ SECTIONS
      * used in boot.S to setup the PTE and in the mte.S test as the address 
that
      * the MTE instructions operate on.
      */
-    mte_page = ALIGN(1 << 22);
+    mte_page = ALIGN(2M);
     /DISCARD/ : {
         *(.ARM.attributes)
     }

  1 .text         00001e60  0000000040001000  0000000040001000  00011000  2**12
  4 .data         00012000  0000000040200000  0000000040200000  00020000  2**12
0000000040400000 g       .data  0000000000000000 mte_page


I was not able to make the MEMORY command work. I tried:

index 46f1092522..dc39518a16 100644
--- a/tests/tcg/aarch64/system/kernel.ld
+++ b/tests/tcg/aarch64/system/kernel.ld
@@ -1,9 +1,13 @@
 ENTRY(__start)
+MEMORY
+{
+    ram (rwx) : ORIGIN = 1 << 30, LENGTH = 16M
+}
+
 SECTIONS
 {
     /* virt machine, RAM starts at 1gb */
-    . = (1 << 30);
     .text : {
         *(.text)
     }
@@ -11,7 +15,7 @@ SECTIONS
         *(.rodata)
     }
     /* align r/w section to next 2mb */
-    . = ALIGN(1 << 21);
+    . = ALIGN(2M);
     .data : {
         *(.data)
     }
@@ -24,7 +28,7 @@ SECTIONS
      * used in boot.S to setup the PTE and in the mte.S test as the address 
that
      * the MTE instructions operate on.
      */
-    mte_page = ALIGN(1 << 22);
+    mte_page = ((1 << 30) + 4M);
     /DISCARD/ : {
         *(.ARM.attributes)
     }

But it didn't work because data section is placed in the wrong place:

  1 .text         00001e60  0000000040001000  0000000040001000  00011000  2**12
  4 .data         00012000  0000000040003000  0000000040003000  00013000  2**12
0000000040400000 g       *ABS*  0000000000000000 mte_page

Do you know why?

I also had to use 'mte_page = ((1 << 30) + 4M);' for the mte_page symbol because
the current location (.) seems to reset to zero for the sections, hence if I do:

+    mte_page = ALIGN(2M);

I get:

0000000040200000 g       .data  0000000000000000 mte_page


Cheers,
Gustavo

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