The following changes since commit e7207a9971dd41618b407030902b0b2256deb664:
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging (2024-08-06 08:02:34 +1000) are available in the Git repository at: https://github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20240806-2 for you to fetch changes up to b3a34eb90d8264bd73ccb25295b1a7e271a9029c: roms/opensbi: Update to v1.5.1 (2024-08-06 15:01:01 +1000) ---------------------------------------------------------------- RISC-V PR for 9.1 * roms/opensbi: update to v1.5.1 * target/riscv: Add asserts for out-of-bound access * Remove redundant insn length check for zama16b ---------------------------------------------------------------- Atish Patra (1): target/riscv: Add asserts for out-of-bound access Daniel Henrique Barboza (1): roms/opensbi: Update to v1.5.1 LIU Zhiwei (3): target/riscv: Remove redundant insn length check for zama16b target/riscv: Add MXLEN check for F/D/Q applies to zama16b target/riscv: Relax fld alignment requirement target/riscv/pmu.c | 4 ++++ target/riscv/insn_trans/trans_rvd.c.inc | 18 ++++++++++++++++-- target/riscv/insn_trans/trans_rvf.c.inc | 4 ++-- target/riscv/insn_trans/trans_rvi.c.inc | 4 ++-- pc-bios/opensbi-riscv32-generic-fw_dynamic.bin | Bin 268312 -> 268312 bytes pc-bios/opensbi-riscv64-generic-fw_dynamic.bin | Bin 272504 -> 272504 bytes roms/opensbi | 2 +- 7 files changed, 25 insertions(+), 7 deletions(-)
